
Sarah Kate Salerno
Examiner (ID: 5206, Phone: (571)270-1266 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 1038 |
| Issued Applications | 711 |
| Pending Applications | 113 |
| Abandoned Applications | 251 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8693378
[patent_doc_number] => 08392916
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-05
[patent_title] => 'Multiple layers of virtualization in a computing system'
[patent_app_type] => utility
[patent_app_number] => 12/347524
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3056
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12347524
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347524 | Multiple layers of virtualization in a computing system | Dec 30, 2008 | Issued |
Array
(
[id] => 6445434
[patent_doc_number] => 20100169622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-01
[patent_title] => 'PROCESSOR REGISTER RECOVERY AFTER FLUSH OPERATION'
[patent_app_type] => utility
[patent_app_number] => 12/347924
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7731
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20100169622.pdf
[firstpage_image] =>[orig_patent_app_number] => 12347924
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347924 | Processor register recovery after flush operation | Dec 30, 2008 | Issued |
Array
(
[id] => 8170668
[patent_doc_number] => 08176297
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-08
[patent_title] => 'Adaptive fetch advance control for a low power processor'
[patent_app_type] => utility
[patent_app_number] => 12/347848
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3861
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/176/08176297.pdf
[firstpage_image] =>[orig_patent_app_number] => 12347848
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347848 | Adaptive fetch advance control for a low power processor | Dec 30, 2008 | Issued |
Array
(
[id] => 6452128
[patent_doc_number] => 20100153967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'PERSISTENT LOCAL STORAGE FOR PROCESSOR RESOURCES'
[patent_app_type] => utility
[patent_app_number] => 12/336546
[patent_app_country] => US
[patent_app_date] => 2008-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6954
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20100153967.pdf
[firstpage_image] =>[orig_patent_app_number] => 12336546
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/336546 | Persistent local storage for processor resources | Dec 16, 2008 | Issued |
Array
(
[id] => 7686250
[patent_doc_number] => 20090178041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-09
[patent_title] => 'Method for Counting Events'
[patent_app_type] => utility
[patent_app_number] => 12/336957
[patent_app_country] => US
[patent_app_date] => 2008-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6638
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0178/20090178041.pdf
[firstpage_image] =>[orig_patent_app_number] => 12336957
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/336957 | Method for counting events in a computer system | Dec 16, 2008 | Issued |
Array
(
[id] => 6451994
[patent_doc_number] => 20100153957
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'SYSTEM AND METHOD FOR MANAGING THREAD USE IN A THREAD POOL'
[patent_app_type] => utility
[patent_app_number] => 12/335893
[patent_app_country] => US
[patent_app_date] => 2008-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5279
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20100153957.pdf
[firstpage_image] =>[orig_patent_app_number] => 12335893
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/335893 | SYSTEM AND METHOD FOR MANAGING THREAD USE IN A THREAD POOL | Dec 15, 2008 | Abandoned |
Array
(
[id] => 5504321
[patent_doc_number] => 20090165009
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'OPTIMAL SCHEDULING FOR CAD ARCHITECTURE'
[patent_app_type] => utility
[patent_app_number] => 12/335344
[patent_app_country] => US
[patent_app_date] => 2008-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2224
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0165/20090165009.pdf
[firstpage_image] =>[orig_patent_app_number] => 12335344
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/335344 | OPTIMAL SCHEDULING FOR CAD ARCHITECTURE | Dec 14, 2008 | Abandoned |
Array
(
[id] => 8810288
[patent_doc_number] => 08447955
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-21
[patent_title] => 'Efficient memory update process for well behaved applications executing on a weakly-ordered processor'
[patent_app_type] => utility
[patent_app_number] => 12/259699
[patent_app_country] => US
[patent_app_date] => 2008-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4646
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 360
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12259699
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/259699 | Efficient memory update process for well behaved applications executing on a weakly-ordered processor | Oct 27, 2008 | Issued |
Array
(
[id] => 10376192
[patent_doc_number] => 20150261199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-17
[patent_title] => 'CONTROL AND SERVO CONTROL INTERCOMMUNICATOR APPARATUS AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/248767
[patent_app_country] => US
[patent_app_date] => 2008-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1872
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12248767
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/248767 | CONTROL AND SERVO CONTROL INTERCOMMUNICATOR APPARATUS AND METHOD | Oct 8, 2008 | Abandoned |
Array
(
[id] => 6389843
[patent_doc_number] => 20100083260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'METHODS AND SYSTEMS TO PERFORM A COMPUTER TASK IN A REDUCED POWER CONSUMPTION STATE'
[patent_app_type] => utility
[patent_app_number] => 12/241849
[patent_app_country] => US
[patent_app_date] => 2008-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3983
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0083/20100083260.pdf
[firstpage_image] =>[orig_patent_app_number] => 12241849
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/241849 | Methods and systems to perform a computer task in a reduced power consumption state | Sep 29, 2008 | Issued |
Array
(
[id] => 8574963
[patent_doc_number] => 08341626
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-12-25
[patent_title] => 'Migration of a virtual machine in response to regional environment effects'
[patent_app_type] => utility
[patent_app_number] => 12/240611
[patent_app_country] => US
[patent_app_date] => 2008-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5421
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12240611
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/240611 | Migration of a virtual machine in response to regional environment effects | Sep 28, 2008 | Issued |
Array
(
[id] => 6228126
[patent_doc_number] => 20100058336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-04
[patent_title] => 'ASSIGNMENT, AT LEAST IN PART, OF AT LEAST ONE VIRTUAL MACHINE TO AT LEAST ONE PACKET'
[patent_app_type] => utility
[patent_app_number] => 12/200709
[patent_app_country] => US
[patent_app_date] => 2008-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4773
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0058/20100058336.pdf
[firstpage_image] =>[orig_patent_app_number] => 12200709
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/200709 | Assignment, at least in part, of at least one virtual machine to at least one packet | Aug 27, 2008 | Issued |
Array
(
[id] => 5576923
[patent_doc_number] => 20090144285
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-04
[patent_title] => 'LOAD BASED FILE ALLOCATION AMONG A PLURALITY OF STORAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/200836
[patent_app_country] => US
[patent_app_date] => 2008-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 23451
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20090144285.pdf
[firstpage_image] =>[orig_patent_app_number] => 12200836
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/200836 | Load based file allocation among a plurality of storage devices | Aug 27, 2008 | Issued |
Array
(
[id] => 4761205
[patent_doc_number] => 20080313431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'Method and System for Altering Processor Execution of a Group of Instructions'
[patent_app_type] => utility
[patent_app_number] => 12/198931
[patent_app_country] => US
[patent_app_date] => 2008-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3440
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0313/20080313431.pdf
[firstpage_image] =>[orig_patent_app_number] => 12198931
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/198931 | Method and system for altering processor execution of a group of instructions | Aug 26, 2008 | Issued |
Array
(
[id] => 9130184
[patent_doc_number] => 08578140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-05
[patent_title] => 'Branch prediction apparatus of computer storing plural branch destination addresses'
[patent_app_type] => utility
[patent_app_number] => 12/196486
[patent_app_country] => US
[patent_app_date] => 2008-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 13479
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12196486
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/196486 | Branch prediction apparatus of computer storing plural branch destination addresses | Aug 21, 2008 | Issued |
Array
(
[id] => 8366827
[patent_doc_number] => 08255906
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Modeling overhead for a plurality of virtualization technologies in a computer system'
[patent_app_type] => utility
[patent_app_number] => 12/196044
[patent_app_country] => US
[patent_app_date] => 2008-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 5532
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12196044
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/196044 | Modeling overhead for a plurality of virtualization technologies in a computer system | Aug 20, 2008 | Issued |
Array
(
[id] => 9680747
[patent_doc_number] => 08819674
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Access to data for virtual devices'
[patent_app_type] => utility
[patent_app_number] => 12/195763
[patent_app_country] => US
[patent_app_date] => 2008-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3444
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12195763
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/195763 | Access to data for virtual devices | Aug 20, 2008 | Issued |
Array
(
[id] => 5438097
[patent_doc_number] => 20090172684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'SMALL LOW POWER EMBEDDED SYSTEM AND PREEMPTION AVOIDANCE METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/193875
[patent_app_country] => US
[patent_app_date] => 2008-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3952
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0172/20090172684.pdf
[firstpage_image] =>[orig_patent_app_number] => 12193875
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/193875 | SMALL LOW POWER EMBEDDED SYSTEM AND PREEMPTION AVOIDANCE METHOD THEREOF | Aug 18, 2008 | Abandoned |
Array
(
[id] => 4712892
[patent_doc_number] => 20080301418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'TRACING COMMAND EXECUTION IN A PARALLEL PROCESSING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/192885
[patent_app_country] => US
[patent_app_date] => 2008-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 16188
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0301/20080301418.pdf
[firstpage_image] =>[orig_patent_app_number] => 12192885
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/192885 | Tracing command execution in a parallel processing system | Aug 14, 2008 | Issued |
Array
(
[id] => 9023444
[patent_doc_number] => 08533441
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-10
[patent_title] => 'Method for managing branch instructions and a device having branch instruction management capabilities'
[patent_app_type] => utility
[patent_app_number] => 12/190291
[patent_app_country] => US
[patent_app_date] => 2008-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3979
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12190291
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/190291 | Method for managing branch instructions and a device having branch instruction management capabilities | Aug 11, 2008 | Issued |