
Sarai E. Butler
Examiner (ID: 6911, Phone: (571)270-3823 , Office: P/2114 )
| Most Active Art Unit | 2114 |
| Art Unit(s) | 2114 |
| Total Applications | 1400 |
| Issued Applications | 1216 |
| Pending Applications | 71 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20281819
[patent_doc_number] => 20250307061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => Processing Tasks in a Processing System
[patent_app_type] => utility
[patent_app_number] => 19/232611
[patent_app_country] => US
[patent_app_date] => 2025-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7373
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19232611
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/232611 | Processing Tasks in a Processing System | Jun 8, 2025 | Pending |
Array
(
[id] => 20234342
[patent_doc_number] => 20250291661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => System and Method for Matching Multiple Featureless Images Across a Time Series for Outage Prediction and Prevention
[patent_app_type] => utility
[patent_app_number] => 19/225218
[patent_app_country] => US
[patent_app_date] => 2025-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2334
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19225218
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/225218 | System and Method for Matching Multiple Featureless Images Across a Time Series for Outage Prediction and Prevention | Jun 1, 2025 | Pending |
Array
(
[id] => 20395411
[patent_doc_number] => 20250370886
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-04
[patent_title] => INSTANT AND IMMEDIATELY CONSISTENT SNAPSHOT RESTORE FROM A CLIENT PERSPECTIVE
[patent_app_type] => utility
[patent_app_number] => 19/223277
[patent_app_country] => US
[patent_app_date] => 2025-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20285
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19223277
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/223277 | INSTANT AND IMMEDIATELY CONSISTENT SNAPSHOT RESTORE FROM A CLIENT PERSPECTIVE | May 29, 2025 | Pending |
Array
(
[id] => 20234347
[patent_doc_number] => 20250291666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => ULTRASOUND SYSTEM AND CONTROL METHOD OF ULTRASOUND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/220935
[patent_app_country] => US
[patent_app_date] => 2025-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7983
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19220935
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/220935 | ULTRASOUND SYSTEM AND CONTROL METHOD OF ULTRASOUND SYSTEM | May 27, 2025 | Pending |
Array
(
[id] => 20693599
[patent_doc_number] => 20260125004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-05-07
[patent_title] => SYSTEMS AND METHODS FOR REDUNDANCY IN RUNTIME VARIANTS
[patent_app_type] => utility
[patent_app_number] => 19/179222
[patent_app_country] => US
[patent_app_date] => 2025-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19179222
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/179222 | SYSTEMS AND METHODS FOR REDUNDANCY IN RUNTIME VARIANTS | Apr 14, 2025 | Pending |
Array
(
[id] => 20337953
[patent_doc_number] => 20250342073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-06
[patent_title] => COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN PERFORMANCE INFORMATION COLLECTING PROGRAM, METHOD FOR COLLECTING PERFORMANCE INFORMATION, AND INFORMATION PROCESSING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 19/176682
[patent_app_country] => US
[patent_app_date] => 2025-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7515
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19176682
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/176682 | COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN PERFORMANCE INFORMATION COLLECTING PROGRAM, METHOD FOR COLLECTING PERFORMANCE INFORMATION, AND INFORMATION PROCESSING APPARATUS | Apr 10, 2025 | Pending |
Array
(
[id] => 20101889
[patent_doc_number] => 20250231825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-17
[patent_title] => RECOVERY IN A MULTIPLE PROCESSOR SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/097304
[patent_app_country] => US
[patent_app_date] => 2025-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11134
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19097304
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/097304 | RECOVERY IN A MULTIPLE PROCESSOR SYSTEM | Mar 31, 2025 | Pending |
Array
(
[id] => 20290098
[patent_doc_number] => 20250315341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => COMPUTER SYSTEM AND FAULT HANDLING SUPPORT METHODS FOR IT SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/092210
[patent_app_country] => US
[patent_app_date] => 2025-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1113
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19092210
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/092210 | COMPUTER SYSTEM AND FAULT HANDLING SUPPORT METHODS FOR IT SYSTEM | Mar 26, 2025 | Pending |
Array
(
[id] => 20281856
[patent_doc_number] => 20250307098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => SYSTEM AND METHOD FOR VALIDATING GRAPHS OUTPUTS GENERATED DURING TEST CASE EXECUTION
[patent_app_type] => utility
[patent_app_number] => 19/074521
[patent_app_country] => US
[patent_app_date] => 2025-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4864
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19074521
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/074521 | SYSTEM AND METHOD FOR VALIDATING GRAPHS OUTPUTS GENERATED DURING TEST CASE EXECUTION | Mar 9, 2025 | Pending |
Array
(
[id] => 20395372
[patent_doc_number] => 20250370847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-04
[patent_title] => FAULT DIAGNOSIS METHOD AND APPARATUS FOR SERVICE FAILURE, AND STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 19/074271
[patent_app_country] => US
[patent_app_date] => 2025-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7473
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19074271
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/074271 | FAULT DIAGNOSIS METHOD AND APPARATUS FOR SERVICE FAILURE, AND STORAGE MEDIUM | Mar 6, 2025 | Pending |
Array
(
[id] => 20281805
[patent_doc_number] => 20250307047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => MEMORY WITH ENHANCED FAIL TRACKING, INCLUDING ENHANCED ERROR CHECK AND SCRUB FAIL TRACKING, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
[patent_app_type] => utility
[patent_app_number] => 19/069215
[patent_app_country] => US
[patent_app_date] => 2025-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6246
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19069215
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/069215 | MEMORY WITH ENHANCED FAIL TRACKING, INCLUDING ENHANCED ERROR CHECK AND SCRUB FAIL TRACKING, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS | Mar 2, 2025 | Pending |
Array
(
[id] => 20027126
[patent_doc_number] => 20250165348
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => PROCESSOR, METHOD FOR OBTAINING INFORMATION, BOARD, AND NETWORK DEVICE
[patent_app_type] => utility
[patent_app_number] => 19/025512
[patent_app_country] => US
[patent_app_date] => 2025-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8822
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025512
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/025512 | PROCESSOR, METHOD FOR OBTAINING INFORMATION, BOARD, AND NETWORK DEVICE | Jan 15, 2025 | Pending |
Array
(
[id] => 20914183
[patent_doc_number] => 12711028
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-08-18
[patent_title] => Flash memory architecture implementing interconnection redundancy
[patent_app_type] => utility
[patent_app_number] => 19/026022
[patent_app_country] => US
[patent_app_date] => 2025-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19026022
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/026022 | FLASH MEMORY ARCHITECTURE IMPLEMENTING INTERCONNECTION REDUNDANCY | Jan 15, 2025 | Pending |
Array
(
[id] => 20337921
[patent_doc_number] => 20250342041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-06
[patent_title] => APPLICATION PROGRAMMING INTERFACE TO INDICATE ACCELERATOR ERROR HANDLERS
[patent_app_type] => utility
[patent_app_number] => 19/016197
[patent_app_country] => US
[patent_app_date] => 2025-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 62288
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19016197
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/016197 | APPLICATION PROGRAMMING INTERFACE TO INDICATE ACCELERATOR ERROR HANDLERS | Jan 9, 2025 | Pending |
Array
(
[id] => 20738356
[patent_doc_number] => 20260147658
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-05-28
[patent_title] => TRACE CLASSIFICATION AND LOG ASSOCIATION FOR DISTRIBUTED SYSTEM TROUBLESHOOTING
[patent_app_type] => utility
[patent_app_number] => 18/957841
[patent_app_country] => US
[patent_app_date] => 2024-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5797
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18957841
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/957841 | TRACE CLASSIFICATION AND LOG ASSOCIATION FOR DISTRIBUTED SYSTEM TROUBLESHOOTING | Nov 23, 2024 | Pending |
Array
(
[id] => 19802583
[patent_doc_number] => 20250068508
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-27
[patent_title] => STORAGE SYSTEM, MEMORY CHIP, AND ERROR CHECK AND SCRUB METHOD
[patent_app_type] => utility
[patent_app_number] => 18/946971
[patent_app_country] => US
[patent_app_date] => 2024-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13938
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18946971
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/946971 | STORAGE SYSTEM, MEMORY CHIP, AND ERROR CHECK AND SCRUB METHOD | Nov 13, 2024 | Pending |
Array
(
[id] => 20828272
[patent_doc_number] => 12681841
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-07-14
[patent_title] => Application interface viability network
[patent_app_type] => utility
[patent_app_number] => 18/944938
[patent_app_country] => US
[patent_app_date] => 2024-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8996
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 390
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18944938
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/944938 | Application interface viability network | Nov 11, 2024 | Issued |
Array
(
[id] => 20790144
[patent_doc_number] => 12664059
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-23
[patent_title] => Systems and methods for generating a decentralized index for a distributed backup solution
[patent_app_type] => utility
[patent_app_number] => 18/936079
[patent_app_country] => US
[patent_app_date] => 2024-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 0
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936079
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/936079 | Systems and methods for generating a decentralized index for a distributed backup solution | Nov 3, 2024 | Issued |
Array
(
[id] => 20680491
[patent_doc_number] => 20260119312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-30
[patent_title] => SIMPLIFIED EFFICIENT ERROR CORRECTION CODE SCHEMES USING MULTIPLE CODEWORDS
[patent_app_type] => utility
[patent_app_number] => 18/934144
[patent_app_country] => US
[patent_app_date] => 2024-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3114
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18934144
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/934144 | SIMPLIFIED EFFICIENT ERROR CORRECTION CODE SCHEMES USING MULTIPLE CODEWORDS | Oct 30, 2024 | Pending |
Array
(
[id] => 20222071
[patent_doc_number] => 20250285002
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => QUANTUM COMPUTING DEVICE FOR HYBRID ERROR MITIGATION BY RESTRICTED EVOLUTION AND METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/929092
[patent_app_country] => US
[patent_app_date] => 2024-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14180
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18929092
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/929092 | QUANTUM COMPUTING DEVICE FOR HYBRID ERROR MITIGATION BY RESTRICTED EVOLUTION AND METHOD THEREOF | Oct 27, 2024 | Pending |