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Sarai E. Butler

Examiner (ID: 17706)

Most Active Art Unit
2114
Art Unit(s)
2114
Total Applications
1386
Issued Applications
1209
Pending Applications
67
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17316922 [patent_doc_number] => 20210405971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => EFFICIENT ESTIMATOR OF MIN-ENTROPY [patent_app_type] => utility [patent_app_number] => 16/916109 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916109
EFFICIENT ESTIMATOR OF MIN-ENTROPY Jun 29, 2020 Abandoned
Array ( [id] => 17317289 [patent_doc_number] => 20210406338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => EIGENVALUE DECOMPOSITION WITH STOCHASTIC OPTIMIZATION [patent_app_type] => utility [patent_app_number] => 16/910975 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910975 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910975
Eigenvalue decomposition with stochastic optimization Jun 23, 2020 Issued
Array ( [id] => 17984625 [patent_doc_number] => 20220350662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => MIXED-SIGNAL ACCELERATION OF DEEP NEURAL NETWORKS [patent_app_type] => utility [patent_app_number] => 17/596734 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17596734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/596734
MIXED-SIGNAL ACCELERATION OF DEEP NEURAL NETWORKS Jun 17, 2020 Pending
Array ( [id] => 17172437 [patent_doc_number] => 20210326107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => HARDWARE ACCELERATION MACHINE LEARNING AND IMAGE PROCESSING SYSTEM WITH ADD AND SHIFT OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/903335 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903335
HARDWARE ACCELERATION MACHINE LEARNING AND IMAGE PROCESSING SYSTEM WITH ADD AND SHIFT OPERATIONS Jun 15, 2020 Abandoned
Array ( [id] => 19552296 [patent_doc_number] => 12136005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Integrated circuits [patent_app_type] => utility [patent_app_number] => 16/892981 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 7194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892981 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/892981
Integrated circuits Jun 3, 2020 Issued
Array ( [id] => 16527571 [patent_doc_number] => 20200401651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => INFORMATION PROCESSING DEVICE AND OPTIMIZATION METHOD [patent_app_type] => utility [patent_app_number] => 16/886890 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886890
Semiconductor integrated circuit May 28, 2020 Issued
Array ( [id] => 18795938 [patent_doc_number] => 11829729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Spatiotemporal fused-multiply-add, and related systems, methods and devices [patent_app_type] => utility [patent_app_number] => 16/888345 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13226 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888345
Spatiotemporal fused-multiply-add, and related systems, methods and devices May 28, 2020 Issued
Array ( [id] => 16454862 [patent_doc_number] => 20200364288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => CIRCUIT FOR NEURAL NETWORK CONVOLUTIONAL CALCULATION OF VARIABLE FEATURE AND KERNEL SIZES [patent_app_type] => utility [patent_app_number] => 15/931730 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15931730 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/931730
Circuit for neural network convolutional calculation of variable feature and kernel sizes May 13, 2020 Issued
Array ( [id] => 17715565 [patent_doc_number] => 11379557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Device and method for flexibly summing matrix values [patent_app_type] => utility [patent_app_number] => 16/869303 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869303
Device and method for flexibly summing matrix values May 6, 2020 Issued
Array ( [id] => 17763646 [patent_doc_number] => 20220237258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => System and Method for Automatic Differentiation of Higher-Order Functions [patent_app_type] => utility [patent_app_number] => 17/607272 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17607272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/607272
System and Method for Automatic Differentiation of Higher-Order Functions Apr 28, 2020 Pending
Array ( [id] => 16470209 [patent_doc_number] => 20200371746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => ARITHMETIC PROCESSING DEVICE, METHOD FOR CONTROLLING ARITHMETIC PROCESSING DEVICE, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR STORING PROGRAM FOR CONTROLLING ARITHMETIC PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 16/854947 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854947 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854947
ARITHMETIC PROCESSING DEVICE, METHOD FOR CONTROLLING ARITHMETIC PROCESSING DEVICE, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR STORING PROGRAM FOR CONTROLLING ARITHMETIC PROCESSING DEVICE Apr 21, 2020 Abandoned
Array ( [id] => 17698899 [patent_doc_number] => 11372623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Random number generating device and operating method of the same [patent_app_type] => utility [patent_app_number] => 16/843466 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16843466 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/843466
Random number generating device and operating method of the same Apr 7, 2020 Issued
Array ( [id] => 18189604 [patent_doc_number] => 11580192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Grouped convolution using point-to-point connected channel convolution engines [patent_app_type] => utility [patent_app_number] => 16/843645 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16843645 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/843645
Grouped convolution using point-to-point connected channel convolution engines Apr 7, 2020 Issued
Array ( [id] => 17715196 [patent_doc_number] => 11379187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Semiconductor device performing a multiplication and accumulation operation [patent_app_type] => utility [patent_app_number] => 16/834706 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4662 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834706
Semiconductor device performing a multiplication and accumulation operation Mar 29, 2020 Issued
Array ( [id] => 16161085 [patent_doc_number] => 20200218775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => METHODS AND CIRCUITRY FOR BOOSTING THE THROUGHPUT OF RECURSIVE SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/820954 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820954
METHODS AND CIRCUITRY FOR BOOSTING THE THROUGHPUT OF RECURSIVE SYSTEMS Mar 16, 2020 Abandoned
Array ( [id] => 17469085 [patent_doc_number] => 11275562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Bit string accumulation [patent_app_type] => utility [patent_app_number] => 16/794550 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 17309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794550 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794550
Bit string accumulation Feb 18, 2020 Issued
Array ( [id] => 17038872 [patent_doc_number] => 20210255831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => METHOD, SYSTEM AND DEVICE FOR MULTI-CYCLE DIVISION OPERATION [patent_app_type] => utility [patent_app_number] => 16/791272 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791272 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791272
Method, system and device for multi-cycle division operation Feb 13, 2020 Issued
Array ( [id] => 17024091 [patent_doc_number] => 20210247962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => MEMORY UNIT WITH MULTIPLY-ACCUMULATE ASSIST SCHEME FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/784215 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16784215 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/784215
Memory unit with multiply-accumulate assist scheme for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof Feb 5, 2020 Issued
Array ( [id] => 17484646 [patent_doc_number] => 20220092150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => CALCULATION VERIFICATION FOR APPROXIMATE CALCULATION [patent_app_type] => utility [patent_app_number] => 17/422278 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17422278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/422278
CALCULATION VERIFICATION FOR APPROXIMATE CALCULATION Jan 9, 2020 Pending
Array ( [id] => 16934650 [patent_doc_number] => 20210200539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => GENERIC LINEAR UNIT HARDWARE ACCELERATOR [patent_app_type] => utility [patent_app_number] => 16/729336 [patent_app_country] => US [patent_app_date] => 2019-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729336
GENERIC LINEAR UNIT HARDWARE ACCELERATOR Dec 27, 2019 Abandoned
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