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Sarai E. Butler

Examiner (ID: 17706)

Most Active Art Unit
2114
Art Unit(s)
2114
Total Applications
1386
Issued Applications
1209
Pending Applications
67
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19506636 [patent_doc_number] => 12118056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Methods and apparatus for performing matrix transformations within a memory array [patent_app_type] => utility [patent_app_number] => 16/403245 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16824 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403245 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403245
Methods and apparatus for performing matrix transformations within a memory array May 2, 2019 Issued
Array ( [id] => 16802332 [patent_doc_number] => 10997277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Multinomial distribution on an integrated circuit [patent_app_type] => utility [patent_app_number] => 16/364837 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364837 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364837
Multinomial distribution on an integrated circuit Mar 25, 2019 Issued
Array ( [id] => 14937065 [patent_doc_number] => 20190304171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => NON-MAXIMUM SUPPRESSION OPERATION DEVICE AND SYSTEM [patent_app_type] => utility [patent_app_number] => 16/364735 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364735
Non-maximum suppression operation device and system Mar 25, 2019 Issued
Array ( [id] => 19493167 [patent_doc_number] => 12111878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Efficient processing of convolutional neural network layers using analog-memory-based hardware [patent_app_type] => utility [patent_app_number] => 16/363463 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 10372 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16363463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/363463
Efficient processing of convolutional neural network layers using analog-memory-based hardware Mar 24, 2019 Issued
Array ( [id] => 17106186 [patent_doc_number] => 11126402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Ternary computation memory systems and circuits employing binary bit cell-XNOR circuits particularly suited to deep neural network (DNN) computing [patent_app_type] => utility [patent_app_number] => 16/360698 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 18131 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/360698
Ternary computation memory systems and circuits employing binary bit cell-XNOR circuits particularly suited to deep neural network (DNN) computing Mar 20, 2019 Issued
Array ( [id] => 16600073 [patent_doc_number] => 20210026604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/982153 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16982153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/982153
SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT Mar 19, 2019 Issued
Array ( [id] => 17771126 [patent_doc_number] => 11403067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Memory array data structure for posit operations [patent_app_type] => utility [patent_app_number] => 16/358971 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 17479 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358971
Memory array data structure for posit operations Mar 19, 2019 Issued
Array ( [id] => 16333262 [patent_doc_number] => 20200304228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => WIDEBAND PHOTONIC RADIO FREQUENCY (RF) NOISE GENERATOR [patent_app_type] => utility [patent_app_number] => 16/359248 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359248 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359248
Wideband photonic radio frequency (RF) noise generator Mar 19, 2019 Issued
Array ( [id] => 17121043 [patent_doc_number] => 11132176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Non-volatile computing method in flash memory [patent_app_type] => utility [patent_app_number] => 16/359919 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359919
Non-volatile computing method in flash memory Mar 19, 2019 Issued
Array ( [id] => 17924893 [patent_doc_number] => 11468145 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-11 [patent_title] => Storage of input values within core of neural network inference circuit [patent_app_type] => utility [patent_app_number] => 16/355659 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 27035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355659 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/355659
Storage of input values within core of neural network inference circuit Mar 14, 2019 Issued
Array ( [id] => 19137265 [patent_doc_number] => 11972229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Semiconductor device and multiply-accumulate operation device [patent_app_type] => utility [patent_app_number] => 17/040959 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 12699 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17040959 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/040959
Semiconductor device and multiply-accumulate operation device Mar 14, 2019 Issued
Array ( [id] => 16942826 [patent_doc_number] => 11055065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => PUF-based true random number generation system [patent_app_type] => utility [patent_app_number] => 16/292330 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5010 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16292330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/292330
PUF-based true random number generation system Mar 4, 2019 Issued
Array ( [id] => 16273059 [patent_doc_number] => 20200274547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => HOST-BASED BIT STRING CONVERSION [patent_app_type] => utility [patent_app_number] => 16/281587 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281587 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/281587
Host-based bit string conversion Feb 20, 2019 Issued
Array ( [id] => 16864465 [patent_doc_number] => 11023205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Negative zero control in instruction execution [patent_app_type] => utility [patent_app_number] => 16/277446 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 15382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277446
Negative zero control in instruction execution Feb 14, 2019 Issued
Array ( [id] => 16226939 [patent_doc_number] => 20200252056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => SYSTEM AND METHOD FOR CALIBRATING FILTER MISMATCH IN MULTI-INPUT MULTI-OUTPUT COMMUNICATION SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/267435 [patent_app_country] => US [patent_app_date] => 2019-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267435 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267435
SYSTEM AND METHOD FOR CALIBRATING FILTER MISMATCH IN MULTI-INPUT MULTI-OUTPUT COMMUNICATION SYSTEMS Feb 4, 2019 Abandoned
Array ( [id] => 16911909 [patent_doc_number] => 11043962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Information processing apparatus, information processing method, and recording medium [patent_app_type] => utility [patent_app_number] => 16/267531 [patent_app_country] => US [patent_app_date] => 2019-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 25125 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267531 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267531
Information processing apparatus, information processing method, and recording medium Feb 4, 2019 Issued
Array ( [id] => 16208853 [patent_doc_number] => 20200241843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => Random Number Generator Based on Meta-Stability of Shorted Back-To-Back Inverters [patent_app_type] => utility [patent_app_number] => 16/258741 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258741
Random number generator based on meta-stability of shorted back-to-back inverters Jan 27, 2019 Issued
Array ( [id] => 16208852 [patent_doc_number] => 20200241842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => ON-CHIP HARDWARE RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 16/257106 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257106 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257106
On-chip hardware random number generator Jan 24, 2019 Issued
Array ( [id] => 14318861 [patent_doc_number] => 20190149134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => FILTER OPTIMIZATION TO IMPROVE COMPUTATIONAL EFFICIENCY OF CONVOLUTION OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/246913 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16246913 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/246913
FILTER OPTIMIZATION TO IMPROVE COMPUTATIONAL EFFICIENCY OF CONVOLUTION OPERATIONS Jan 13, 2019 Abandoned
Array ( [id] => 16690842 [patent_doc_number] => 20210073320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => VIDEO, AUDIO, AND HISTORICAL TREND DATA INTERPOLATION [patent_app_type] => utility [patent_app_number] => 16/959939 [patent_app_country] => US [patent_app_date] => 2019-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959939
VIDEO, AUDIO, AND HISTORICAL TREND DATA INTERPOLATION Jan 2, 2019 Abandoned
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