Sarira Camilla Pourbohloul

Array ( [id] => 6636985 [patent_doc_number] => 20020016883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-07 [patent_title] => 'Method and apparatus for allocating and de-allocating consecutive blocks of memory in background memory management' [patent_app_type] => new [patent_app_number] => 09/881934 [patent_app_country] => US [patent_app_date] => 2001-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8413 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20020016883.pdf [firstpage_image] =>[orig_patent_app_number] => 09881934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1049517 [patent_doc_number] => 06865598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Utilization of unused disk space on networked computers' [patent_app_type] => utility [patent_app_number] => 09/875950 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 8121 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/865/06865598.pdf [firstpage_image] =>[orig_patent_app_number] => 09875950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1027540 [patent_doc_number] => 06886032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Utilization of unused disk space on networked computer' [patent_app_type] => utility [patent_app_number] => 09/876161 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 16 [patent_no_of_words] => 8157 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/886/06886032.pdf [firstpage_image] =>[orig_patent_app_number] => 09876161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6988689 [patent_doc_number] => 20010037432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Data processor having cache memory' [patent_app_type] => new [patent_app_number] => 09/864287 [patent_app_country] => US [patent_app_date] => 2001-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 24357 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20010037432.pdf [firstpage_image] =>[orig_patent_app_number] => 09864287 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7095080 [patent_doc_number] => 20010034820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Multiple mode memory module' [patent_app_type] => new [patent_app_number] => 09/854555 [patent_app_country] => US [patent_app_date] => 2001-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6849 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20010034820.pdf [firstpage_image] =>[orig_patent_app_number] => 09854555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429765 [patent_doc_number] => 06510492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-21 [patent_title] => 'Apparatus for controlling data transfer between a bus and memory array and method for operating same' [patent_app_type] => B2 [patent_app_number] => 09/851713 [patent_app_country] => US [patent_app_date] => 2001-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510492.pdf [firstpage_image] =>[orig_patent_app_number] => 09851713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6580430 [patent_doc_number] => 20020166061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller' [patent_app_type] => new [patent_app_number] => 09/850543 [patent_app_country] => US [patent_app_date] => 2001-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13728 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20020166061.pdf [firstpage_image] =>[orig_patent_app_number] => 09850543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1308726 [patent_doc_number] => 06629201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'System and method for high-speed substitute cache' [patent_app_type] => B2 [patent_app_number] => 09/847638 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7660 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629201.pdf [firstpage_image] =>[orig_patent_app_number] => 09847638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6894528 [patent_doc_number] => 20010016894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Apparatus, system, and method for reducing bus contention during consecutive read-write operations' [patent_app_type] => new [patent_app_number] => 09/847154 [patent_app_country] => US [patent_app_date] => 2001-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6408 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016894.pdf [firstpage_image] =>[orig_patent_app_number] => 09847154 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1567437 [patent_doc_number] => 06363460 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Memory paging control method' [patent_app_type] => B1 [patent_app_number] => 09/837155 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3128 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363460.pdf [firstpage_image] =>[orig_patent_app_number] => 09837155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6962783 [patent_doc_number] => 20010013082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Memory paging control apparatus' [patent_app_type] => new [patent_app_number] => 09/836951 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3164 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013082.pdf [firstpage_image] =>[orig_patent_app_number] => 09836951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6885443 [patent_doc_number] => 20010039608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Architecture and configuring method for a computer expansion board' [patent_app_type] => new [patent_app_number] => 09/777264 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1673 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20010039608.pdf [firstpage_image] =>[orig_patent_app_number] => 09777264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7016131 [patent_doc_number] => 20010052052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-13 [patent_title] => 'Apparatus and methods for providing coordinated and personalized application and data management for resource-limited mobile devices' [patent_app_type] => new [patent_app_number] => 09/776594 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20010052052.pdf [firstpage_image] =>[orig_patent_app_number] => 09776594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6831440 [patent_doc_number] => 20030182498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Combined content addressable memories' [patent_app_type] => new [patent_app_number] => 10/240104 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5074 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182498.pdf [firstpage_image] =>[orig_patent_app_number] => 10240104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5984313 [patent_doc_number] => 20020097687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Remote mirroring in a switched environment' [patent_app_type] => new [patent_app_number] => 09/767773 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5106 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20020097687.pdf [firstpage_image] =>[orig_patent_app_number] => 09767773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6876969 [patent_doc_number] => 20010007122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-05 [patent_title] => 'Multi-port memory device with multiple modes of operation and improved expansion characteristics' [patent_app_type] => new-utility [patent_app_number] => 09/757290 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4113 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20010007122.pdf [firstpage_image] =>[orig_patent_app_number] => 09757290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 517620 [patent_doc_number] => 07203731 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-10 [patent_title] => 'Dynamic replication of files in a network storage system' [patent_app_type] => utility [patent_app_number] => 09/753220 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 33 [patent_no_of_words] => 18683 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203731.pdf [firstpage_image] =>[orig_patent_app_number] => 09753220 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6085529 [patent_doc_number] => 20020083277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Mechanisms to improve bus-request scheduling' [patent_app_type] => new [patent_app_number] => 09/748979 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20020083277.pdf [firstpage_image] =>[orig_patent_app_number] => 09748979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1183511 [patent_doc_number] => 06751703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Data storage systems and methods which utilize an on-board cache' [patent_app_type] => B2 [patent_app_number] => 09/749160 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7941 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751703.pdf [firstpage_image] =>[orig_patent_app_number] => 09749160 [rel_patent_id] =>[rel_patent_doc_number] =>)