Search

Sarira Camilla Pourbohloul

Examiner (ID: 426, Phone: (571)270-7744 , Office: P/1765 )

Most Active Art Unit
1765
Art Unit(s)
1765, 1796
Total Applications
236
Issued Applications
141
Pending Applications
1
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5734576 [patent_doc_number] => 20060259693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'DETERMINING THE PRESENCE OF A VIRTUAL ADDRESS IN A CACHE' [patent_app_type] => utility [patent_app_number] => 11/383354 [patent_app_country] => US [patent_app_date] => 2006-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11455 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20060259693.pdf [firstpage_image] =>[orig_patent_app_number] => 11383354 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/383354
Determining the presence of a virtual address in a cache May 14, 2006 Issued
Array ( [id] => 5047543 [patent_doc_number] => 20070266217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'SELECTIVE CACHE LINE ALLOCATION INSTRUCTION EXECUTION AND CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 11/382900 [patent_app_country] => US [patent_app_date] => 2006-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20070266217.pdf [firstpage_image] =>[orig_patent_app_number] => 11382900 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/382900
Selective cache line allocation instruction execution and circuitry May 10, 2006 Issued
Array ( [id] => 343147 [patent_doc_number] => 07502908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Method for providing an address format compatible with different addressing formats used for addressing different sized address spaces' [patent_app_type] => utility [patent_app_number] => 11/381712 [patent_app_country] => US [patent_app_date] => 2006-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5596 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/502/07502908.pdf [firstpage_image] =>[orig_patent_app_number] => 11381712 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/381712
Method for providing an address format compatible with different addressing formats used for addressing different sized address spaces May 3, 2006 Issued
Array ( [id] => 5226638 [patent_doc_number] => 20070255905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'Method and Apparatus for Caching Variable Length Instructions' [patent_app_type] => utility [patent_app_number] => 11/381038 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6001 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255905.pdf [firstpage_image] =>[orig_patent_app_number] => 11381038 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/381038
Method and apparatus for caching variable length instructions Apr 30, 2006 Issued
Array ( [id] => 325138 [patent_doc_number] => 07519792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Memory region access management' [patent_app_type] => utility [patent_app_number] => 11/359041 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3624 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/519/07519792.pdf [firstpage_image] =>[orig_patent_app_number] => 11359041 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/359041
Memory region access management Feb 20, 2006 Issued
Array ( [id] => 5071438 [patent_doc_number] => 20070192540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Architectural support for thread level speculative execution' [patent_app_type] => utility [patent_app_number] => 11/351829 [patent_app_country] => US [patent_app_date] => 2006-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5985 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20070192540.pdf [firstpage_image] =>[orig_patent_app_number] => 11351829 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/351829
Architectural support for thread level speculative execution Feb 9, 2006 Issued
Array ( [id] => 5102799 [patent_doc_number] => 20070186061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Shared interface for components in an embedded system' [patent_app_type] => utility [patent_app_number] => 11/349631 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5424 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20070186061.pdf [firstpage_image] =>[orig_patent_app_number] => 11349631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349631
Shared interface for components in an embedded system Feb 7, 2006 Issued
Array ( [id] => 809933 [patent_doc_number] => 07421542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-02 [patent_title] => 'Technique for data cache synchronization' [patent_app_type] => utility [patent_app_number] => 11/344679 [patent_app_country] => US [patent_app_date] => 2006-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/421/07421542.pdf [firstpage_image] =>[orig_patent_app_number] => 11344679 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/344679
Technique for data cache synchronization Jan 30, 2006 Issued
Array ( [id] => 5706620 [patent_doc_number] => 20060195668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Remote copy for a storage controller with reduced data size' [patent_app_type] => utility [patent_app_number] => 11/323773 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 25461 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20060195668.pdf [firstpage_image] =>[orig_patent_app_number] => 11323773 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323773
Remote copy for a storage controller with reduced data size Dec 29, 2005 Issued
Array ( [id] => 927433 [patent_doc_number] => 07318129 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-01-08 [patent_title] => 'Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller' [patent_app_type] => utility [patent_app_number] => 11/301287 [patent_app_country] => US [patent_app_date] => 2005-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 13633 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/318/07318129.pdf [firstpage_image] =>[orig_patent_app_number] => 11301287 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/301287
Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller Dec 11, 2005 Issued
Array ( [id] => 518280 [patent_doc_number] => 07203800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Narrow/wide cache' [patent_app_type] => utility [patent_app_number] => 11/299264 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6353 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203800.pdf [firstpage_image] =>[orig_patent_app_number] => 11299264 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/299264
Narrow/wide cache Nov 30, 2005 Issued
Array ( [id] => 5816527 [patent_doc_number] => 20060085618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Management method and a management system for volume' [patent_app_type] => utility [patent_app_number] => 11/290123 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 14368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20060085618.pdf [firstpage_image] =>[orig_patent_app_number] => 11290123 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/290123
Management method and a management system for volume Nov 28, 2005 Issued
Array ( [id] => 925030 [patent_doc_number] => 07320056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-15 [patent_title] => 'Multi-processor system' [patent_app_type] => utility [patent_app_number] => 11/285184 [patent_app_country] => US [patent_app_date] => 2005-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 11456 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/320/07320056.pdf [firstpage_image] =>[orig_patent_app_number] => 11285184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/285184
Multi-processor system Nov 22, 2005 Issued
Array ( [id] => 5097092 [patent_doc_number] => 20070118701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'System and method for supporting variable-width memory accesses' [patent_app_type] => utility [patent_app_number] => 11/284568 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20070118701.pdf [firstpage_image] =>[orig_patent_app_number] => 11284568 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/284568
System and method for supporting variable-width memory accesses Nov 21, 2005 Issued
Array ( [id] => 5597817 [patent_doc_number] => 20060161735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Multithread controller and control method' [patent_app_type] => utility [patent_app_number] => 11/283832 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10778 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20060161735.pdf [firstpage_image] =>[orig_patent_app_number] => 11283832 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283832
Multithread controller and control method Nov 21, 2005 Issued
Array ( [id] => 829151 [patent_doc_number] => 07404035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'System for controlling spinning of disk' [patent_app_type] => utility [patent_app_number] => 11/284099 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 9867 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/404/07404035.pdf [firstpage_image] =>[orig_patent_app_number] => 11284099 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/284099
System for controlling spinning of disk Nov 21, 2005 Issued
Array ( [id] => 885575 [patent_doc_number] => 07356657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'System and method for controlling storage devices' [patent_app_type] => utility [patent_app_number] => 11/283880 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 12309 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/356/07356657.pdf [firstpage_image] =>[orig_patent_app_number] => 11283880 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283880
System and method for controlling storage devices Nov 21, 2005 Issued
Array ( [id] => 927417 [patent_doc_number] => 07318121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-08 [patent_title] => 'Synchronized mirrored data in a data storage device' [patent_app_type] => utility [patent_app_number] => 11/283273 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8303 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/318/07318121.pdf [firstpage_image] =>[orig_patent_app_number] => 11283273 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283273
Synchronized mirrored data in a data storage device Nov 17, 2005 Issued
Array ( [id] => 4973020 [patent_doc_number] => 20070113023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Method and system for accessing a single port memory' [patent_app_type] => utility [patent_app_number] => 11/273750 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20070113023.pdf [firstpage_image] =>[orig_patent_app_number] => 11273750 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/273750
Method and system for accessing a single port memory Nov 14, 2005 Issued
Array ( [id] => 5663048 [patent_doc_number] => 20060253644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Method and system for configuring parameters for flash memory' [patent_app_type] => utility [patent_app_number] => 11/272206 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6172 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20060253644.pdf [firstpage_image] =>[orig_patent_app_number] => 11272206 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/272206
Method and system for configuring parameters for flash memory Nov 9, 2005 Issued
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