Sarira Camilla Pourbohloul

Array ( [id] => 4160467 [patent_doc_number] => 06061763 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Memory management system employing multiple buffer caches' [patent_app_type] => 1 [patent_app_number] => 8/934351 [patent_app_country] => US [patent_app_date] => 1997-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9583 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061763.pdf [firstpage_image] =>[orig_patent_app_number] => 934351 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177800 [patent_doc_number] => 06108759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Manipulation of partitions holding advanced file systems' [patent_app_type] => 1 [patent_app_number] => 8/932530 [patent_app_country] => US [patent_app_date] => 1997-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6245 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108759.pdf [firstpage_image] =>[orig_patent_app_number] => 932530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3955480 [patent_doc_number] => 05940873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Address-translation method and system for translating effective addresses into physical addressee in computers' [patent_app_type] => 1 [patent_app_number] => 8/927067 [patent_app_country] => US [patent_app_date] => 1997-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2782 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940873.pdf [firstpage_image] =>[orig_patent_app_number] => 927067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177787 [patent_doc_number] => 06108758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Multiple masters in a memory control system' [patent_app_type] => 1 [patent_app_number] => 8/921194 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2375 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108758.pdf [firstpage_image] =>[orig_patent_app_number] => 921194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4239035 [patent_doc_number] => 06088773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Checkpoint acquisition accelerating apparatus' [patent_app_type] => 1 [patent_app_number] => 8/917923 [patent_app_country] => US [patent_app_date] => 1997-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 30 [patent_no_of_words] => 19839 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088773.pdf [firstpage_image] =>[orig_patent_app_number] => 917923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3960252 [patent_doc_number] => 05930818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Information communication system which transmits main data and data for restoring the main data' [patent_app_type] => 1 [patent_app_number] => 8/916284 [patent_app_country] => US [patent_app_date] => 1997-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 8073 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930818.pdf [firstpage_image] =>[orig_patent_app_number] => 916284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4426631 [patent_doc_number] => 06178487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Manipulating disk partitions between disks' [patent_app_type] => 1 [patent_app_number] => 8/900086 [patent_app_country] => US [patent_app_date] => 1997-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 17037 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178487.pdf [firstpage_image] =>[orig_patent_app_number] => 900086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4001866 [patent_doc_number] => 05950230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'RAID array configuration synchronization at power on' [patent_app_type] => 1 [patent_app_number] => 8/887391 [patent_app_country] => US [patent_app_date] => 1997-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 4 [patent_no_of_words] => 9377 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/950/05950230.pdf [firstpage_image] =>[orig_patent_app_number] => 887391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373761 [patent_doc_number] => 06202133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Method of processing memory transactions in a computer system having dual system memories and memory controllers' [patent_app_type] => 1 [patent_app_number] => 8/887041 [patent_app_country] => US [patent_app_date] => 1997-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5980 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202133.pdf [firstpage_image] =>[orig_patent_app_number] => 887041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4092315 [patent_doc_number] => 05966729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Snoop filter for use in multiprocessor computer systems' [patent_app_type] => 1 [patent_app_number] => 8/885007 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966729.pdf [firstpage_image] =>[orig_patent_app_number] => 885007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4040744 [patent_doc_number] => 05926835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Method of isolating a memory location containing an obsolete value' [patent_app_type] => 1 [patent_app_number] => 8/878768 [patent_app_country] => US [patent_app_date] => 1997-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2780 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926835.pdf [firstpage_image] =>[orig_patent_app_number] => 878768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1595909 [patent_doc_number] => 06484244 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method and system for storing and processing multiple memory commands' [patent_app_type] => B1 [patent_app_number] => 08/877191 [patent_app_country] => US [patent_app_date] => 1997-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7667 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484244.pdf [firstpage_image] =>[orig_patent_app_number] => 08877191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4426612 [patent_doc_number] => 06178480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method for operating an array of video storage units' [patent_app_type] => 1 [patent_app_number] => 8/870506 [patent_app_country] => US [patent_app_date] => 1997-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 14764 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178480.pdf [firstpage_image] =>[orig_patent_app_number] => 870506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3955251 [patent_doc_number] => 05940858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Cache circuit with programmable sizing and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/865664 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9426 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940858.pdf [firstpage_image] =>[orig_patent_app_number] => 865664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3961707 [patent_doc_number] => 05974519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Address re-designate circuit for microcontroller' [patent_app_type] => 1 [patent_app_number] => 8/865935 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2044 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/974/05974519.pdf [firstpage_image] =>[orig_patent_app_number] => 865935 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4011706 [patent_doc_number] => 05893164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Method of tracking incomplete writes in a disk array and disk storage system which performs such method' [patent_app_type] => 1 [patent_app_number] => 8/865647 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4949 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/893/05893164.pdf [firstpage_image] =>[orig_patent_app_number] => 865647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3969455 [patent_doc_number] => 05956749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Data back-up system using nonvolatile read/write memory' [patent_app_type] => 1 [patent_app_number] => 8/865659 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1826 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956749.pdf [firstpage_image] =>[orig_patent_app_number] => 865659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944472 [patent_doc_number] => 05946718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Shadow translation look-aside buffer and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/866441 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946718.pdf [firstpage_image] =>[orig_patent_app_number] => 866441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944352 [patent_doc_number] => 05946711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'System for locking data in a shared cache' [patent_app_type] => 1 [patent_app_number] => 8/866431 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4800 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946711.pdf [firstpage_image] =>[orig_patent_app_number] => 866431 [rel_patent_id] =>[rel_patent_doc_number] =>)