Sarira Camilla Pourbohloul

Array ( [id] => 7384624 [patent_doc_number] => 20040221099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/741630 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2619 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221099.pdf [firstpage_image] =>[orig_patent_app_number] => 10741630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6995398 [patent_doc_number] => 20050135176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Synchronizing memory copy operations with memory accesses' [patent_app_type] => utility [patent_app_number] => 10/741721 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4071 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20050135176.pdf [firstpage_image] =>[orig_patent_app_number] => 10741721 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7417277 [patent_doc_number] => 20040107315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Storage system' [patent_app_type] => new [patent_app_number] => 10/721088 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 29290 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107315.pdf [firstpage_image] =>[orig_patent_app_number] => 10721088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5722242 [patent_doc_number] => 20060075018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Method and device for storing content on a removable medium' [patent_app_type] => utility [patent_app_number] => 10/540806 [patent_app_country] => US [patent_app_date] => 2003-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2255 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20060075018.pdf [firstpage_image] =>[orig_patent_app_number] => 10540806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7234035 [patent_doc_number] => 20040073741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Cache management system' [patent_app_type] => new [patent_app_number] => 10/705426 [patent_app_country] => US [patent_app_date] => 2003-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8347 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20040073741.pdf [firstpage_image] =>[orig_patent_app_number] => 10705426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 744947 [patent_doc_number] => 07035988 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-25 [patent_title] => 'Hardware implementation of an N-way dynamic linked list' [patent_app_type] => utility [patent_app_number] => 10/696257 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/035/07035988.pdf [firstpage_image] =>[orig_patent_app_number] => 10696257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 690780 [patent_doc_number] => 07080229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Method and system for strategy driven provisioning of storage in a storage area network' [patent_app_type] => utility [patent_app_number] => 10/696434 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7463 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/080/07080229.pdf [firstpage_image] =>[orig_patent_app_number] => 10696434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 749371 [patent_doc_number] => 07032087 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-18 [patent_title] => 'Erase count differential table within a non-volatile memory system' [patent_app_type] => utility [patent_app_number] => 10/696228 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 9127 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/032/07032087.pdf [firstpage_image] =>[orig_patent_app_number] => 10696228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 679932 [patent_doc_number] => 07089349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Internal maintenance schedule request for non-volatile memory system' [patent_app_type] => utility [patent_app_number] => 10/696229 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9524 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089349.pdf [firstpage_image] =>[orig_patent_app_number] => 10696229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6992420 [patent_doc_number] => 20050091457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Method and apparatus for an in-situ victim cache' [patent_app_type] => utility [patent_app_number] => 10/696074 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4194 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20050091457.pdf [firstpage_image] =>[orig_patent_app_number] => 10696074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 671524 [patent_doc_number] => 07096322 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-22 [patent_title] => 'Instruction processor write buffer emulation using embedded emulation control instructions' [patent_app_type] => utility [patent_app_number] => 10/683028 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5162 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/096/07096322.pdf [firstpage_image] =>[orig_patent_app_number] => 10683028 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 684634 [patent_doc_number] => 07085881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/681184 [patent_app_country] => US [patent_app_date] => 2003-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 10190 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085881.pdf [firstpage_image] =>[orig_patent_app_number] => 10681184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 995876 [patent_doc_number] => 06918014 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-12 [patent_title] => 'Dynamic distributed data system and method' [patent_app_type] => utility [patent_app_number] => 10/679863 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4115 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/918/06918014.pdf [firstpage_image] =>[orig_patent_app_number] => 10679863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7029668 [patent_doc_number] => 20050021627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Adaptive remote copy in a heterogeneous environment' [patent_app_type] => utility [patent_app_number] => 10/661373 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 15039 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20050021627.pdf [firstpage_image] =>[orig_patent_app_number] => 10661373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7221305 [patent_doc_number] => 20050055349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'SDRAM controller that improves performance for imaging applications' [patent_app_type] => utility [patent_app_number] => 10/656609 [patent_app_country] => US [patent_app_date] => 2003-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2620 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20050055349.pdf [firstpage_image] =>[orig_patent_app_number] => 10656609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7386350 [patent_doc_number] => 20040037153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Multi-port memory device with multiple modes of operation and improved expansion characteristics' [patent_app_type] => new [patent_app_number] => 10/649435 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4113 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20040037153.pdf [firstpage_image] =>[orig_patent_app_number] => 10649435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 782225 [patent_doc_number] => 06996680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Data prefetching method' [patent_app_type] => utility [patent_app_number] => 10/647261 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 17908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/996/06996680.pdf [firstpage_image] =>[orig_patent_app_number] => 10647261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 649042 [patent_doc_number] => 07120760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Harvard architecture microprocessor having a linear addressable space' [patent_app_type] => utility [patent_app_number] => 10/645321 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4605 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120760.pdf [firstpage_image] =>[orig_patent_app_number] => 10645321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7214132 [patent_doc_number] => 20050044326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Processor and processor method of operation' [patent_app_type] => utility [patent_app_number] => 10/645738 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2259 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20050044326.pdf [firstpage_image] =>[orig_patent_app_number] => 10645738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7214064 [patent_doc_number] => 20050044314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Method and apparatus for managing inventory and door status during firmware update of an automated data storage library' [patent_app_type] => utility [patent_app_number] => 10/646652 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3857 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20050044314.pdf [firstpage_image] =>[orig_patent_app_number] => 10646652 [rel_patent_id] =>[rel_patent_doc_number] =>)