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Saumit Shah

Examiner (ID: 16826, Phone: (571)272-6959 , Office: P/2414 )

Most Active Art Unit
2414
Art Unit(s)
2414
Total Applications
605
Issued Applications
465
Pending Applications
88
Abandoned Applications
66

Applications

Application numberTitle of the applicationFiling DateStatus
08/861782 FAULT BLOCK DETECTING SYSTEM USING ABNORMAL CURRENT AND ABNORMAL DATA OUTPUT May 21, 1997 Abandoned
08/825260 AUTOMATED ANALYSIS OF A MODEL BASED DIAGNOSTIC SYSTEM Mar 26, 1997 Abandoned
Array ( [id] => 3801905 [patent_doc_number] => 05822515 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Correction of uncommanded mode changes in a spacecraft subsystem' [patent_app_type] => 1 [patent_app_number] => 8/797878 [patent_app_country] => US [patent_app_date] => 1997-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2339 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822515.pdf [firstpage_image] =>[orig_patent_app_number] => 797878 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797878
Correction of uncommanded mode changes in a spacecraft subsystem Feb 9, 1997 Issued
Array ( [id] => 3757736 [patent_doc_number] => 05717702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Scan testing digital logic with differing frequencies of system clock and test clock' [patent_app_type] => 1 [patent_app_number] => 8/751379 [patent_app_country] => US [patent_app_date] => 1996-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4155 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 525 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717702.pdf [firstpage_image] =>[orig_patent_app_number] => 751379 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/751379
Scan testing digital logic with differing frequencies of system clock and test clock Nov 18, 1996 Issued
Array ( [id] => 3994856 [patent_doc_number] => 05862149 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Method of partitioning logic designs for automatic test pattern generation based on logical registers' [patent_app_type] => 1 [patent_app_number] => 8/726332 [patent_app_country] => US [patent_app_date] => 1996-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9313 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862149.pdf [firstpage_image] =>[orig_patent_app_number] => 726332 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726332
Method of partitioning logic designs for automatic test pattern generation based on logical registers Oct 2, 1996 Issued
Array ( [id] => 3871376 [patent_doc_number] => 05768494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Method of correcting read error in digital data processing system by implementing a predetermind number of data read retrials' [patent_app_type] => 1 [patent_app_number] => 8/741658 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2557 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768494.pdf [firstpage_image] =>[orig_patent_app_number] => 741658 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/741658
Method of correcting read error in digital data processing system by implementing a predetermind number of data read retrials Sep 23, 1996 Issued
Array ( [id] => 3732654 [patent_doc_number] => 05682392 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Method and apparatus for the automatic generation of boundary scan description language files' [patent_app_type] => 1 [patent_app_number] => 8/699219 [patent_app_country] => US [patent_app_date] => 1996-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10060 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682392.pdf [firstpage_image] =>[orig_patent_app_number] => 699219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/699219
Method and apparatus for the automatic generation of boundary scan description language files Aug 18, 1996 Issued
Array ( [id] => 3781588 [patent_doc_number] => 05734663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Abbreviated trial-and-error technique for correcting long bursts of consecutive errors using CRC bytes' [patent_app_type] => 1 [patent_app_number] => 8/669664 [patent_app_country] => US [patent_app_date] => 1996-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4264 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734663.pdf [firstpage_image] =>[orig_patent_app_number] => 669664 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/669664
Abbreviated trial-and-error technique for correcting long bursts of consecutive errors using CRC bytes Jun 23, 1996 Issued
08/668076 FLASH EPROM CONTROL WITH EMBEDDED PULSE TIMER AND WITH BUILT-IN SIGNATURE ANALYSIS Jun 13, 1996 Abandoned
Array ( [id] => 3857698 [patent_doc_number] => 05745670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Fault tolerant power supply system' [patent_app_type] => 1 [patent_app_number] => 8/661368 [patent_app_country] => US [patent_app_date] => 1996-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2977 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745670.pdf [firstpage_image] =>[orig_patent_app_number] => 661368 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/661368
Fault tolerant power supply system Jun 10, 1996 Issued
08/656738 AUTOMATED PASSWORD RESET Jun 2, 1996 Abandoned
Array ( [id] => 3877524 [patent_doc_number] => 05796943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Communication apparatus' [patent_app_type] => 1 [patent_app_number] => 8/655888 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 9220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796943.pdf [firstpage_image] =>[orig_patent_app_number] => 655888 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/655888
Communication apparatus May 30, 1996 Issued
Array ( [id] => 3917696 [patent_doc_number] => 05751942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Trace event detection during trace enable transitions' [patent_app_type] => 1 [patent_app_number] => 8/647387 [patent_app_country] => US [patent_app_date] => 1996-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5659 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751942.pdf [firstpage_image] =>[orig_patent_app_number] => 647387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/647387
Trace event detection during trace enable transitions May 8, 1996 Issued
Array ( [id] => 3700740 [patent_doc_number] => 05692121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Recovery unit for mirrored processors' [patent_app_type] => 1 [patent_app_number] => 8/641771 [patent_app_country] => US [patent_app_date] => 1996-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7669 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/692/05692121.pdf [firstpage_image] =>[orig_patent_app_number] => 641771 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/641771
Recovery unit for mirrored processors Apr 29, 1996 Issued
Array ( [id] => 3742483 [patent_doc_number] => 05704038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Power-on-reset and watchdog circuit and method' [patent_app_type] => 1 [patent_app_number] => 8/632328 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2336 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/704/05704038.pdf [firstpage_image] =>[orig_patent_app_number] => 632328 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632328
Power-on-reset and watchdog circuit and method Apr 16, 1996 Issued
Array ( [id] => 3871439 [patent_doc_number] => 05768499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Method and apparatus for dynamically displaying and causing the execution of software diagnostic/test programs for the silicon validation of microprocessors' [patent_app_type] => 1 [patent_app_number] => 8/627878 [patent_app_country] => US [patent_app_date] => 1996-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5053 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768499.pdf [firstpage_image] =>[orig_patent_app_number] => 627878 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627878
Method and apparatus for dynamically displaying and causing the execution of software diagnostic/test programs for the silicon validation of microprocessors Apr 2, 1996 Issued
08/627915 METHOD FOR TESTING CELL MARGIN ON DRAM DEVICES Apr 1, 1996 Abandoned
08/626647 NETWORK FAULT CORRELATION Mar 31, 1996 Abandoned
Array ( [id] => 3635703 [patent_doc_number] => 05594865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Watchdog timer that can detect processor runaway while processor is accessing storage unit using data comparing unit to reset timer' [patent_app_type] => 1 [patent_app_number] => 8/621325 [patent_app_country] => US [patent_app_date] => 1996-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3168 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594865.pdf [firstpage_image] =>[orig_patent_app_number] => 621325 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621325
Watchdog timer that can detect processor runaway while processor is accessing storage unit using data comparing unit to reset timer Mar 24, 1996 Issued
Array ( [id] => 3852715 [patent_doc_number] => 05761675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Diagnosis and repair of defective long filenames' [patent_app_type] => 1 [patent_app_number] => 8/618188 [patent_app_country] => US [patent_app_date] => 1996-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4011 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761675.pdf [firstpage_image] =>[orig_patent_app_number] => 618188 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618188
Diagnosis and repair of defective long filenames Mar 18, 1996 Issued
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