Search

Savitri Mulpuri

Examiner (ID: 17417, Phone: (571)272-1677 , Office: P/2816 )

Most Active Art Unit
2812
Art Unit(s)
2816, 1107, 2812
Total Applications
1898
Issued Applications
1575
Pending Applications
50
Abandoned Applications
278

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13392867 [patent_doc_number] => 20180247976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => METHODS AND APPARATUS FOR THREE-DIMENSIONAL NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 15/445734 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15445734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/445734
Methods and apparatus for three-dimensional nonvolatile memory Feb 27, 2017 Issued
Array ( [id] => 16700141 [patent_doc_number] => 10950752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Method of producing a radiation-emitting semiconductor chip and radiation-emitting semiconductor chip [patent_app_type] => utility [patent_app_number] => 16/067955 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4155 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16067955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/067955
Method of producing a radiation-emitting semiconductor chip and radiation-emitting semiconductor chip Feb 21, 2017 Issued
Array ( [id] => 13363643 [patent_doc_number] => 20180233361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => DUMMY PATTERN ADDITION TO IMPROVE CD UNIFORMITY [patent_app_type] => utility [patent_app_number] => 15/422689 [patent_app_country] => US [patent_app_date] => 2017-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15422689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/422689
Dummy pattern addition to improve CD uniformity Feb 14, 2017 Issued
Array ( [id] => 15673031 [patent_doc_number] => 10600756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-24 [patent_title] => Wire bonding technique for integrated circuit board connections [patent_app_type] => utility [patent_app_number] => 15/432969 [patent_app_country] => US [patent_app_date] => 2017-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3723 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15432969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/432969
Wire bonding technique for integrated circuit board connections Feb 14, 2017 Issued
Array ( [id] => 11869436 [patent_doc_number] => 20170236721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'RAPID HEATING PROCESS IN THE PRODUCTION OF SEMICONDUCTOR COMPONENTS' [patent_app_type] => utility [patent_app_number] => 15/433099 [patent_app_country] => US [patent_app_date] => 2017-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5705 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15433099 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/433099
Rapid heating process in the production of semiconductor components Feb 14, 2017 Issued
Array ( [id] => 11952252 [patent_doc_number] => 20170256403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'Method of Manufacturing Buffer Layers Having Composite Structures' [patent_app_type] => utility [patent_app_number] => 15/432168 [patent_app_country] => US [patent_app_date] => 2017-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15432168 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/432168
Method of Manufacturing Buffer Layers Having Composite Structures Feb 13, 2017 Abandoned
Array ( [id] => 15401087 [patent_doc_number] => 10541205 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => Manufacture of interconnects for integration of multiple integrated circuits [patent_app_type] => utility [patent_app_number] => 15/432823 [patent_app_country] => US [patent_app_date] => 2017-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5449 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15432823 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/432823
Manufacture of interconnects for integration of multiple integrated circuits Feb 13, 2017 Issued
Array ( [id] => 11869435 [patent_doc_number] => 20170236720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'PATTERN FORMING METHOD' [patent_app_type] => utility [patent_app_number] => 15/430640 [patent_app_country] => US [patent_app_date] => 2017-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2332 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430640 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/430640
Pattern forming method Feb 12, 2017 Issued
Array ( [id] => 11918364 [patent_doc_number] => 09786555 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-10 [patent_title] => 'Method for reducing contact resistance' [patent_app_type] => utility [patent_app_number] => 15/430913 [patent_app_country] => US [patent_app_date] => 2017-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 2778 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430913 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/430913
Method for reducing contact resistance Feb 12, 2017 Issued
Array ( [id] => 16201877 [patent_doc_number] => 10727055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Method to increase the lithographic process window of extreme ultra violet negative tone development resists [patent_app_type] => utility [patent_app_number] => 15/429871 [patent_app_country] => US [patent_app_date] => 2017-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7022 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15429871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/429871
Method to increase the lithographic process window of extreme ultra violet negative tone development resists Feb 9, 2017 Issued
Array ( [id] => 11869434 [patent_doc_number] => 20170236719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'METHOD AND APPARATUS FOR MULTI-FILM DEPOSITION AND ETCHING IN A BATCH PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/428905 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/428905
Method and apparatus for multi-film deposition and etching in a batch processing system Feb 8, 2017 Issued
Array ( [id] => 11959350 [patent_doc_number] => 20170263502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'METHOD FOR MANUFACTURING ELEMENT CHIP' [patent_app_type] => utility [patent_app_number] => 15/428477 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7480 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/428477
METHOD FOR MANUFACTURING ELEMENT CHIP Feb 8, 2017 Abandoned
Array ( [id] => 11983582 [patent_doc_number] => 20170287737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/428176 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10112 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428176 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/428176
Method for manufacturing semiconductor device Feb 8, 2017 Issued
Array ( [id] => 14332921 [patent_doc_number] => 10297489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Plasma processing method and plasma processing apparatus [patent_app_type] => utility [patent_app_number] => 15/427590 [patent_app_country] => US [patent_app_date] => 2017-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 10071 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15427590 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/427590
Plasma processing method and plasma processing apparatus Feb 7, 2017 Issued
Array ( [id] => 14639529 [patent_doc_number] => 10364497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Vapor based site-isolated processing systems and methods [patent_app_type] => utility [patent_app_number] => 15/427882 [patent_app_country] => US [patent_app_date] => 2017-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6053 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15427882 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/427882
Vapor based site-isolated processing systems and methods Feb 7, 2017 Issued
Array ( [id] => 12114958 [patent_doc_number] => 09870952 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-16 [patent_title] => 'Formation of VFET and finFET' [patent_app_type] => utility [patent_app_number] => 15/426479 [patent_app_country] => US [patent_app_date] => 2017-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 6856 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15426479 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/426479
Formation of VFET and finFET Feb 6, 2017 Issued
Array ( [id] => 16502449 [patent_doc_number] => 10867843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Method and system for fabrication semiconductor device [patent_app_type] => utility [patent_app_number] => 15/426226 [patent_app_country] => US [patent_app_date] => 2017-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15426226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/426226
Method and system for fabrication semiconductor device Feb 6, 2017 Issued
Array ( [id] => 12376080 [patent_doc_number] => 09960254 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-01 [patent_title] => Replacement metal gate scheme with self-alignment gate for vertical field effect transistors [patent_app_type] => utility [patent_app_number] => 15/424937 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 46 [patent_no_of_words] => 11863 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424937 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/424937
Replacement metal gate scheme with self-alignment gate for vertical field effect transistors Feb 5, 2017 Issued
Array ( [id] => 12499341 [patent_doc_number] => 09997742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Method of manufacturing an organic EL display device [patent_app_type] => utility [patent_app_number] => 15/425297 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4071 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425297 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425297
Method of manufacturing an organic EL display device Feb 5, 2017 Issued
Array ( [id] => 11918561 [patent_doc_number] => 09786754 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-10 [patent_title] => 'Method for forming semiconductor device structure' [patent_app_type] => utility [patent_app_number] => 15/425673 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 29 [patent_no_of_words] => 5743 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425673 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425673
Method for forming semiconductor device structure Feb 5, 2017 Issued
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