Scott A. Richmond

Array ( [id] => 3954755 [patent_doc_number] => 05900008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/769188 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 4614 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/900/05900008.pdf [firstpage_image] =>[orig_patent_app_number] => 769188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4026716 [patent_doc_number] => 05890189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Memory management and protection system for virtual memory in computer system' [patent_app_type] => 1 [patent_app_number] => 8/753944 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 71 [patent_no_of_words] => 31458 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/890/05890189.pdf [firstpage_image] =>[orig_patent_app_number] => 753944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4040859 [patent_doc_number] => 05884085 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller' [patent_app_type] => 1 [patent_app_number] => 8/757412 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 79 [patent_no_of_words] => 40108 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/884/05884085.pdf [firstpage_image] =>[orig_patent_app_number] => 757412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3990027 [patent_doc_number] => 05905914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller' [patent_app_type] => 1 [patent_app_number] => 8/753792 [patent_app_country] => US [patent_app_date] => 1996-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 78 [patent_no_of_words] => 40098 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905914.pdf [firstpage_image] =>[orig_patent_app_number] => 753792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3824591 [patent_doc_number] => 05710881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Data merging method and apparatus for shared memory multiprocessing computer systems' [patent_app_type] => 1 [patent_app_number] => 8/755686 [patent_app_country] => US [patent_app_date] => 1996-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 13197 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710881.pdf [firstpage_image] =>[orig_patent_app_number] => 755686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3951759 [patent_doc_number] => 05872945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'MX bus translation to new system bus protocol' [patent_app_type] => 1 [patent_app_number] => 8/749084 [patent_app_country] => US [patent_app_date] => 1996-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3395 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872945.pdf [firstpage_image] =>[orig_patent_app_number] => 749084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3998562 [patent_doc_number] => 05862393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'System for managing power of a computer with removable devices' [patent_app_type] => 1 [patent_app_number] => 8/727715 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7882 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862393.pdf [firstpage_image] =>[orig_patent_app_number] => 727715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4057758 [patent_doc_number] => 05875341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Method for managing interrupt signals in a real-time computer system' [patent_app_type] => 1 [patent_app_number] => 8/719413 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3475 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875341.pdf [firstpage_image] =>[orig_patent_app_number] => 719413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3854497 [patent_doc_number] => 05708789 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Structure to utilize a partially functional cache memory by invalidation of faulty cache memory locations' [patent_app_type] => 1 [patent_app_number] => 8/717139 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3197 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708789.pdf [firstpage_image] =>[orig_patent_app_number] => 717139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3825493 [patent_doc_number] => 05832194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Electronic apparatus, process for its duplication, and arrangement for data transfer between two similarly constructed electronic apparatus' [patent_app_type] => 1 [patent_app_number] => 8/710512 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9241 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832194.pdf [firstpage_image] =>[orig_patent_app_number] => 710512 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3716012 [patent_doc_number] => 05675737 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Message receiving system for use in parallel computer system' [patent_app_type] => 1 [patent_app_number] => 8/682478 [patent_app_country] => US [patent_app_date] => 1996-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4600 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675737.pdf [firstpage_image] =>[orig_patent_app_number] => 682478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3805971 [patent_doc_number] => 05737752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Cache replacement mechanism' [patent_app_type] => 1 [patent_app_number] => 8/670238 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1094 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737752.pdf [firstpage_image] =>[orig_patent_app_number] => 670238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3815478 [patent_doc_number] => 05829010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Apparatus and method to efficiently abort and restart a primary memory access' [patent_app_type] => 1 [patent_app_number] => 8/657817 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3502 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829010.pdf [firstpage_image] =>[orig_patent_app_number] => 657817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3818720 [patent_doc_number] => 05854944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Method and apparatus for determining wait states on a per cycle basis in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/645014 [patent_app_country] => US [patent_app_date] => 1996-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6237 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854944.pdf [firstpage_image] =>[orig_patent_app_number] => 645014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3767321 [patent_doc_number] => 05721869 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Data processing apparatus with function of effecting hang-up processing' [patent_app_type] => 1 [patent_app_number] => 8/638853 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5566 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721869.pdf [firstpage_image] =>[orig_patent_app_number] => 638853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3895273 [patent_doc_number] => 05765014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Electronic computer system and processor element for processing in a data driven manner using reverse polish notation' [patent_app_type] => 1 [patent_app_number] => 8/637560 [patent_app_country] => US [patent_app_date] => 1996-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7944 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765014.pdf [firstpage_image] =>[orig_patent_app_number] => 637560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3903669 [patent_doc_number] => 05724611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Automatic cache controller system and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/637513 [patent_app_country] => US [patent_app_date] => 1996-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1882 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724611.pdf [firstpage_image] =>[orig_patent_app_number] => 637513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3804049 [patent_doc_number] => 05737626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Deterministic communication network for industrial control' [patent_app_type] => 1 [patent_app_number] => 8/616999 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5942 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737626.pdf [firstpage_image] =>[orig_patent_app_number] => 616999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3855215 [patent_doc_number] => 05708840 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Micro personal digital assistant' [patent_app_type] => 1 [patent_app_number] => 8/610242 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 50 [patent_no_of_words] => 20119 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708840.pdf [firstpage_image] =>[orig_patent_app_number] => 610242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3678219 [patent_doc_number] => 05669009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Signal processing array' [patent_app_type] => 1 [patent_app_number] => 8/606511 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2890 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/669/05669009.pdf [firstpage_image] =>[orig_patent_app_number] => 606511 [rel_patent_id] =>[rel_patent_doc_number] =>)