Search

Scott A. Smith

Examiner (ID: 231, Phone: (571)272-4469 , Office: P/3721 )

Most Active Art Unit
3721
Art Unit(s)
3731, 3727, 3204, 3205, 3616, 3721
Total Applications
3908
Issued Applications
3490
Pending Applications
120
Abandoned Applications
330

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19879618 [patent_doc_number] => 20250111875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACKING IN SINGLE AND MULTIPORT SRAM [patent_app_type] => utility [patent_app_number] => 18/815356 [patent_app_country] => US [patent_app_date] => 2024-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18815356 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/815356
PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACKING IN SINGLE AND MULTIPORT SRAM Aug 25, 2024 Pending
Array ( [id] => 20044600 [patent_doc_number] => 20250182822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => NEUROMORPHIC DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/796752 [patent_app_country] => US [patent_app_date] => 2024-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18796752 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/796752
NEUROMORPHIC DEVICE AND OPERATION METHOD THEREOF Aug 6, 2024 Pending
Array ( [id] => 19820695 [patent_doc_number] => 20250078902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => VOLTAGE-THRESHOLD VIOLATION DETECTION CIRCUITS IN MEMORY DEVICES AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/789682 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789682 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789682
VOLTAGE-THRESHOLD VIOLATION DETECTION CIRCUITS IN MEMORY DEVICES AND SYSTEMS Jul 30, 2024 Pending
Array ( [id] => 20488384 [patent_doc_number] => 20260024585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => MEMORY DEVICE AND OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/783132 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18783132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/783132
MEMORY DEVICE AND OPERATION THEREOF Jul 23, 2024 Pending
Array ( [id] => 19749208 [patent_doc_number] => 20250037773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => READ VOLTAGE OVERDRIVE IN READ RECOVERY [patent_app_type] => utility [patent_app_number] => 18/781618 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781618 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/781618
READ VOLTAGE OVERDRIVE IN READ RECOVERY Jul 22, 2024 Pending
Array ( [id] => 19559622 [patent_doc_number] => 20240371414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ON-DIE HEATER DEVICES FOR MEMORY DEVICES AND MEMORY MODULES [patent_app_type] => utility [patent_app_number] => 18/777441 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777441 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777441
ON-DIE HEATER DEVICES FOR MEMORY DEVICES AND MEMORY MODULES Jul 17, 2024 Pending
Array ( [id] => 19726920 [patent_doc_number] => 20250029671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => INTEGRATED RANDOM ACCESS MEMORY USING INVERTER LOOPS [patent_app_type] => utility [patent_app_number] => 18/769849 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769849 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769849
INTEGRATED RANDOM ACCESS MEMORY USING INVERTER LOOPS Jul 10, 2024 Pending
Array ( [id] => 19714527 [patent_doc_number] => 20250024669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => Programmable Read-Only Memory Cell [patent_app_type] => utility [patent_app_number] => 18/770212 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770212 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770212
Programmable Read-Only Memory Cell Jul 10, 2024 Pending
Array ( [id] => 19546157 [patent_doc_number] => 20240363193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/768747 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18768747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/768747
PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES Jul 9, 2024 Pending
Array ( [id] => 19546119 [patent_doc_number] => 20240363155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => METHOD FOR EFFICIENTLY WAKING UP FERROELECTRIC MEMORY [patent_app_type] => utility [patent_app_number] => 18/766808 [patent_app_country] => US [patent_app_date] => 2024-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18766808 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/766808
METHOD FOR EFFICIENTLY WAKING UP FERROELECTRIC MEMORY Jul 8, 2024 Pending
Array ( [id] => 19515431 [patent_doc_number] => 20240347117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SOLID STATE DRIVE (SSD) WITH IN-FLIGHT ERASURE ITERATION SUSPENSION [patent_app_type] => utility [patent_app_number] => 18/752493 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752493
SOLID STATE DRIVE (SSD) WITH IN-FLIGHT ERASURE ITERATION SUSPENSION Jun 23, 2024 Pending
Array ( [id] => 19712378 [patent_doc_number] => 20250022520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MULTIBIT MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/750321 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6814 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750321 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750321
MULTIBIT MEMORY DEVICE AND METHOD OF OPERATING THE SAME Jun 20, 2024 Pending
Array ( [id] => 20088554 [patent_doc_number] => 20250218490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => MEMORY DEVICE INCLUDING ROW HAMMER MANAGING CIRCUIT, AND METHOD OF REFRESH OPERATION FOR THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/748293 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748293
MEMORY DEVICE INCLUDING ROW HAMMER MANAGING CIRCUIT, AND METHOD OF REFRESH OPERATION FOR THE MEMORY DEVICE Jun 19, 2024 Pending
Array ( [id] => 19500135 [patent_doc_number] => 20240339153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => BIT LINE SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 18/746974 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746974
BIT LINE SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME Jun 17, 2024 Pending
Array ( [id] => 19820743 [patent_doc_number] => 20250078950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/745894 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18745894 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/745894
APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES Jun 16, 2024 Pending
Array ( [id] => 19986741 [patent_doc_number] => 20250124963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => APPARATUSES AND METHODS FOR PER-ROW COUNT BASED REFRESH TARGET IDENTIFICATION WITH SORTING [patent_app_type] => utility [patent_app_number] => 18/744988 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744988
APPARATUSES AND METHODS FOR PER-ROW COUNT BASED REFRESH TARGET IDENTIFICATION WITH SORTING Jun 16, 2024 Pending
Array ( [id] => 19481844 [patent_doc_number] => 20240329886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => MEMORY DEVICE INCLUDING INTERFACE CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/738172 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738172 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/738172
Memory device including interface circuit and method of operating the same Jun 9, 2024 Issued
Array ( [id] => 20396708 [patent_doc_number] => 20250372183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => APPARATUS AND METHODS FOR HOLE CURRENT PROGRAM VERIFY OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/675685 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675685
APPARATUS AND METHODS FOR HOLE CURRENT PROGRAM VERIFY OPERATIONS May 27, 2024 Pending
Array ( [id] => 19618889 [patent_doc_number] => 20240404569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 18/675916 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675916 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675916
IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER NEURAL NETWORK May 27, 2024 Pending
Array ( [id] => 20063067 [patent_doc_number] => 20250201289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => HIGH-BANDWIDTH MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/670875 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670875
HIGH-BANDWIDTH MEMORY DEVICE AND OPERATION METHOD THEREOF May 21, 2024 Pending
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