Search

Scott A. Smith

Examiner (ID: 5262, Phone: (571)272-4469 , Office: P/3721 )

Most Active Art Unit
3721
Art Unit(s)
3731, 3204, 3727, 3721, 3616, 3205
Total Applications
3908
Issued Applications
3490
Pending Applications
118
Abandoned Applications
330

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4656211 [patent_doc_number] => 20080025072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/878039 [patent_app_country] => US [patent_app_date] => 2007-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13816 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20080025072.pdf [firstpage_image] =>[orig_patent_app_number] => 11878039 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/878039
Nonvolatile semiconductor memory device Jul 19, 2007 Issued
Array ( [id] => 4650053 [patent_doc_number] => 20080037309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/779657 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10695 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20080037309.pdf [firstpage_image] =>[orig_patent_app_number] => 11779657 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779657
SEMICONDUCTOR MEMORY DEVICE Jul 17, 2007 Abandoned
Array ( [id] => 5044763 [patent_doc_number] => 20070263435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Multiport semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/826493 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8990 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263435.pdf [firstpage_image] =>[orig_patent_app_number] => 11826493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826493
Multiport semiconductor memory device Jul 15, 2007 Issued
Array ( [id] => 4703264 [patent_doc_number] => 20080062787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'METHOD OF DETECTING BIT LINE BRIDGE BY SELECTIVELY FLOATING EVEN-OR ODD-NUMBERED BIT LINES OF MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/777627 [patent_app_country] => US [patent_app_date] => 2007-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2995 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20080062787.pdf [firstpage_image] =>[orig_patent_app_number] => 11777627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/777627
Method of detecting bit line bridge by selectively floating even-or odd-numbered bit lines of memory device Jul 12, 2007 Issued
Array ( [id] => 814984 [patent_doc_number] => 07414871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Program control circuit of flash memory device having MLC and method thereof' [patent_app_type] => utility [patent_app_number] => 11/776844 [patent_app_country] => US [patent_app_date] => 2007-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6857 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414871.pdf [firstpage_image] =>[orig_patent_app_number] => 11776844 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/776844
Program control circuit of flash memory device having MLC and method thereof Jul 11, 2007 Issued
Array ( [id] => 572296 [patent_doc_number] => 07471557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Reading phase change memories to reduce read disturbs' [patent_app_type] => utility [patent_app_number] => 11/827230 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5616 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/471/07471557.pdf [firstpage_image] =>[orig_patent_app_number] => 11827230 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/827230
Reading phase change memories to reduce read disturbs Jul 10, 2007 Issued
Array ( [id] => 5308824 [patent_doc_number] => 20090016105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'NONVOLATILE MEMORY UTILIZING MIS MEMORY TRANSISTORS CAPABLE OF MULTIPLE STORE OPERATIONS' [patent_app_type] => utility [patent_app_number] => 11/775951 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9034 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20090016105.pdf [firstpage_image] =>[orig_patent_app_number] => 11775951 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/775951
Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations Jul 10, 2007 Issued
Array ( [id] => 4744547 [patent_doc_number] => 20080089149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'Semiconductor memory apparatus for allocating different read/write operating time to every bank' [patent_app_type] => utility [patent_app_number] => 11/822655 [patent_app_country] => US [patent_app_date] => 2007-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20080089149.pdf [firstpage_image] =>[orig_patent_app_number] => 11822655 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/822655
Semiconductor memory apparatus for allocating different read/write operating time to every bank Jul 8, 2007 Issued
Array ( [id] => 5015102 [patent_doc_number] => 20070258310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/774540 [patent_app_country] => US [patent_app_date] => 2007-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4368 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20070258310.pdf [firstpage_image] =>[orig_patent_app_number] => 11774540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/774540
SEMICONDUCTOR INTEGRATED CIRCUIT Jul 5, 2007 Abandoned
Array ( [id] => 7596662 [patent_doc_number] => 07619920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'NAND type flash memory and write method of the same' [patent_app_type] => utility [patent_app_number] => 11/773771 [patent_app_country] => US [patent_app_date] => 2007-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/619/07619920.pdf [firstpage_image] =>[orig_patent_app_number] => 11773771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/773771
NAND type flash memory and write method of the same Jul 4, 2007 Issued
Array ( [id] => 308431 [patent_doc_number] => 07532509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Segmented bit line for flash memory' [patent_app_type] => utility [patent_app_number] => 11/772115 [patent_app_country] => US [patent_app_date] => 2007-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2523 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532509.pdf [firstpage_image] =>[orig_patent_app_number] => 11772115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772115
Segmented bit line for flash memory Jun 29, 2007 Issued
Array ( [id] => 327711 [patent_doc_number] => 07515492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/823965 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3739 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/515/07515492.pdf [firstpage_image] =>[orig_patent_app_number] => 11823965 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/823965
Semiconductor memory device Jun 28, 2007 Issued
Array ( [id] => 261033 [patent_doc_number] => 07573764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Circuit for testing word line of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/824843 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2178 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573764.pdf [firstpage_image] =>[orig_patent_app_number] => 11824843 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/824843
Circuit for testing word line of semiconductor memory device Jun 28, 2007 Issued
Array ( [id] => 4942965 [patent_doc_number] => 20080080290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Memory device having small clock buffer' [patent_app_type] => utility [patent_app_number] => 11/823943 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4334 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20080080290.pdf [firstpage_image] =>[orig_patent_app_number] => 11823943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/823943
Memory device having small clock buffer Jun 28, 2007 Issued
Array ( [id] => 134024 [patent_doc_number] => 07701758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Nonvolatile memory device and control method thereof' [patent_app_type] => utility [patent_app_number] => 11/771537 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6121 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701758.pdf [firstpage_image] =>[orig_patent_app_number] => 11771537 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771537
Nonvolatile memory device and control method thereof Jun 28, 2007 Issued
Array ( [id] => 4818341 [patent_doc_number] => 20080225600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'METHOD OF READING DATA IN A NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/771979 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4331 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20080225600.pdf [firstpage_image] =>[orig_patent_app_number] => 11771979 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771979
Method of reading data in a non-volatile memory device Jun 28, 2007 Issued
Array ( [id] => 4964124 [patent_doc_number] => 20080106944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'METHOD FOR SETTING PROGRAMMING START BIAS FOR FLASH MEMORY DEVICE AND PROGRAMMING METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/771465 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2122 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20080106944.pdf [firstpage_image] =>[orig_patent_app_number] => 11771465 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771465
Method for setting programming start bias for flash memory device and programming method using the same Jun 28, 2007 Issued
Array ( [id] => 312081 [patent_doc_number] => 07529116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Memory device having a threshold voltage switching device and a method for storing information in the memory device' [patent_app_type] => utility [patent_app_number] => 11/771131 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2780 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529116.pdf [firstpage_image] =>[orig_patent_app_number] => 11771131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771131
Memory device having a threshold voltage switching device and a method for storing information in the memory device Jun 28, 2007 Issued
Array ( [id] => 282874 [patent_doc_number] => 07554876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/819565 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3397 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554876.pdf [firstpage_image] =>[orig_patent_app_number] => 11819565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819565
Semiconductor memory device Jun 27, 2007 Issued
Array ( [id] => 4668457 [patent_doc_number] => 20080043517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/770183 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9683 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043517.pdf [firstpage_image] =>[orig_patent_app_number] => 11770183 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770183
Memory device Jun 27, 2007 Issued
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