Search

Scott A. Smith

Examiner (ID: 5262, Phone: (571)272-4469 , Office: P/3721 )

Most Active Art Unit
3721
Art Unit(s)
3731, 3204, 3727, 3721, 3616, 3205
Total Applications
3908
Issued Applications
3490
Pending Applications
118
Abandoned Applications
330

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4750900 [patent_doc_number] => 20080158971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'METHOD FOR READING NAND FLASH MEMORY DEVICE USING SELF-BOOSTING' [patent_app_type] => utility [patent_app_number] => 11/770687 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5614 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158971.pdf [firstpage_image] =>[orig_patent_app_number] => 11770687 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770687
Method for reading NAND flash memory device using self-boosting Jun 27, 2007 Issued
Array ( [id] => 4668468 [patent_doc_number] => 20080043528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE PROVIDED WITH MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE' [patent_app_type] => utility [patent_app_number] => 11/770199 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 16589 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043528.pdf [firstpage_image] =>[orig_patent_app_number] => 11770199 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770199
Semiconductor storage device provided with memory cell having charge accumulation layer and control gate Jun 27, 2007 Issued
Array ( [id] => 4823213 [patent_doc_number] => 20080123455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Sense amplifier of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/823781 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3097 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20080123455.pdf [firstpage_image] =>[orig_patent_app_number] => 11823781 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/823781
Sense amplifier of semiconductor memory device Jun 26, 2007 Issued
Array ( [id] => 240544 [patent_doc_number] => 07593266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Semiconductor memory device and method of verifying the same' [patent_app_type] => utility [patent_app_number] => 11/819173 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3784 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/593/07593266.pdf [firstpage_image] =>[orig_patent_app_number] => 11819173 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819173
Semiconductor memory device and method of verifying the same Jun 25, 2007 Issued
Array ( [id] => 6445120 [patent_doc_number] => 20100188923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/666251 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7344 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188923.pdf [firstpage_image] =>[orig_patent_app_number] => 12666251 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/666251
Semiconductor device Jun 24, 2007 Issued
Array ( [id] => 5015095 [patent_doc_number] => 20070258303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'Semiconductor Memory Device' [patent_app_type] => utility [patent_app_number] => 11/766486 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 28157 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20070258303.pdf [firstpage_image] =>[orig_patent_app_number] => 11766486 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766486
Semiconductor memory device Jun 20, 2007 Issued
Array ( [id] => 4757986 [patent_doc_number] => 20080310212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'SRAM WITH ASYMMETRICAL PASS GATES' [patent_app_type] => utility [patent_app_number] => 11/763555 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0310/20080310212.pdf [firstpage_image] =>[orig_patent_app_number] => 11763555 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/763555
SRAM with asymmetrical pass gates Jun 14, 2007 Issued
Array ( [id] => 5124709 [patent_doc_number] => 20070236980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'FERROELECTRIC RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 11/763073 [patent_app_country] => US [patent_app_date] => 2007-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11426 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20070236980.pdf [firstpage_image] =>[orig_patent_app_number] => 11763073 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/763073
Ferroelectric random access memory Jun 13, 2007 Issued
Array ( [id] => 4757994 [patent_doc_number] => 20080310220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => '3-D SRAM ARRAY TO IMPROVE STABILITY AND PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 11/762339 [patent_app_country] => US [patent_app_date] => 2007-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6382 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0310/20080310220.pdf [firstpage_image] =>[orig_patent_app_number] => 11762339 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/762339
3-D SRAM ARRAY TO IMPROVE STABILITY AND PERFORMANCE Jun 12, 2007 Abandoned
Array ( [id] => 4976035 [patent_doc_number] => 20070217266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Static random access memory' [patent_app_type] => utility [patent_app_number] => 11/757493 [patent_app_country] => US [patent_app_date] => 2007-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16921 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20070217266.pdf [firstpage_image] =>[orig_patent_app_number] => 11757493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/757493
Static random access memory Jun 3, 2007 Abandoned
Array ( [id] => 4492327 [patent_doc_number] => 07885095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-08 [patent_title] => 'Magnetic random access memory and operation method of the same' [patent_app_type] => utility [patent_app_number] => 12/303821 [patent_app_country] => US [patent_app_date] => 2007-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9577 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/885/07885095.pdf [firstpage_image] =>[orig_patent_app_number] => 12303821 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/303821
Magnetic random access memory and operation method of the same May 31, 2007 Issued
Array ( [id] => 5003705 [patent_doc_number] => 20070201272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/797164 [patent_app_country] => US [patent_app_date] => 2007-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15909 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20070201272.pdf [firstpage_image] =>[orig_patent_app_number] => 11797164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/797164
Semiconductor device Apr 30, 2007 Issued
Array ( [id] => 589131 [patent_doc_number] => 07453732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Method for programming memory cells including transconductance degradation detection' [patent_app_type] => utility [patent_app_number] => 11/742334 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8989 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/453/07453732.pdf [firstpage_image] =>[orig_patent_app_number] => 11742334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/742334
Method for programming memory cells including transconductance degradation detection Apr 29, 2007 Issued
Array ( [id] => 353610 [patent_doc_number] => 07492636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Methods for conducting double-side-biasing operations of NAND memory arrays' [patent_app_type] => utility [patent_app_number] => 11/741059 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9612 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/492/07492636.pdf [firstpage_image] =>[orig_patent_app_number] => 11741059 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741059
Methods for conducting double-side-biasing operations of NAND memory arrays Apr 26, 2007 Issued
Array ( [id] => 289839 [patent_doc_number] => 07548458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Methods of biasing a multi-level-cell memory' [patent_app_type] => utility [patent_app_number] => 11/741045 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6280 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/548/07548458.pdf [firstpage_image] =>[orig_patent_app_number] => 11741045 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741045
Methods of biasing a multi-level-cell memory Apr 26, 2007 Issued
Array ( [id] => 335303 [patent_doc_number] => 07508717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-24 [patent_title] => 'Reading circuit for semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/740941 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 9577 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/508/07508717.pdf [firstpage_image] =>[orig_patent_app_number] => 11740941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740941
Reading circuit for semiconductor memory Apr 26, 2007 Issued
Array ( [id] => 4937601 [patent_doc_number] => 20080074918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Phase change memory device and related programming method' [patent_app_type] => utility [patent_app_number] => 11/790011 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20080074918.pdf [firstpage_image] =>[orig_patent_app_number] => 11790011 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790011
Phase change memory device and related programming method Apr 22, 2007 Issued
Array ( [id] => 4796417 [patent_doc_number] => 20080008003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Non-Volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/789003 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4970 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20080008003.pdf [firstpage_image] =>[orig_patent_app_number] => 11789003 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/789003
Non-volatile memory device Apr 22, 2007 Issued
Array ( [id] => 264746 [patent_doc_number] => 07570517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Flash memory device adapted to prevent read failures due to dummy strings' [patent_app_type] => utility [patent_app_number] => 11/785709 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3888 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/570/07570517.pdf [firstpage_image] =>[orig_patent_app_number] => 11785709 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/785709
Flash memory device adapted to prevent read failures due to dummy strings Apr 18, 2007 Issued
Array ( [id] => 315867 [patent_doc_number] => 07525845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Non-volatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 11/785527 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 16413 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/525/07525845.pdf [firstpage_image] =>[orig_patent_app_number] => 11785527 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/785527
Non-volatile semiconductor storage device Apr 17, 2007 Issued
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