Search

Scott A. Smith

Examiner (ID: 5262, Phone: (571)272-4469 , Office: P/3721 )

Most Active Art Unit
3721
Art Unit(s)
3731, 3204, 3727, 3721, 3616, 3205
Total Applications
3908
Issued Applications
3490
Pending Applications
118
Abandoned Applications
330

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5033236 [patent_doc_number] => 20070097775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Flash memory device' [patent_app_type] => utility [patent_app_number] => 11/488709 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1929 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20070097775.pdf [firstpage_image] =>[orig_patent_app_number] => 11488709 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488709
Flash memory device Jul 18, 2006 Issued
Array ( [id] => 5044785 [patent_doc_number] => 20070263457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Flash memory device and erase method thereof' [patent_app_type] => utility [patent_app_number] => 11/488149 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8563 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263457.pdf [firstpage_image] =>[orig_patent_app_number] => 11488149 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488149
Flash memory device and erase method thereof Jul 17, 2006 Issued
Array ( [id] => 409926 [patent_doc_number] => 07286420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/488053 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5290 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286420.pdf [firstpage_image] =>[orig_patent_app_number] => 11488053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488053
Semiconductor memory device Jul 17, 2006 Issued
Array ( [id] => 264770 [patent_doc_number] => 07570541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/488024 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14532 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/570/07570541.pdf [firstpage_image] =>[orig_patent_app_number] => 11488024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488024
Semiconductor memory device Jul 17, 2006 Issued
Array ( [id] => 4801797 [patent_doc_number] => 20080013384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'Concurrent programming and program verification of floating gate transistor' [patent_app_type] => utility [patent_app_number] => 11/487863 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6011 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20080013384.pdf [firstpage_image] =>[orig_patent_app_number] => 11487863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487863
Concurrent programming and program verification of floating gate transistor Jul 16, 2006 Issued
Array ( [id] => 197231 [patent_doc_number] => 07636259 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-12-22 [patent_title] => 'Flash memory array with independently erasable sectors' [patent_app_type] => utility [patent_app_number] => 11/487647 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/636/07636259.pdf [firstpage_image] =>[orig_patent_app_number] => 11487647 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487647
Flash memory array with independently erasable sectors Jul 16, 2006 Issued
Array ( [id] => 377935 [patent_doc_number] => 07313039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Method for analyzing defect of SRAM cell' [patent_app_type] => utility [patent_app_number] => 11/486805 [patent_app_country] => US [patent_app_date] => 2006-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2982 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/313/07313039.pdf [firstpage_image] =>[orig_patent_app_number] => 11486805 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/486805
Method for analyzing defect of SRAM cell Jul 13, 2006 Issued
Array ( [id] => 4801796 [patent_doc_number] => 20080013383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'Modular design of multiport memory bitcells' [patent_app_type] => utility [patent_app_number] => 11/487061 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20080013383.pdf [firstpage_image] =>[orig_patent_app_number] => 11487061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487061
Modular design of multiport memory bitcells Jul 12, 2006 Issued
Array ( [id] => 441357 [patent_doc_number] => 07260015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Memory device and method having multiple internal data buses and memory bank interleaving' [patent_app_type] => utility [patent_app_number] => 11/482213 [patent_app_country] => US [patent_app_date] => 2006-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4173 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/260/07260015.pdf [firstpage_image] =>[orig_patent_app_number] => 11482213 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/482213
Memory device and method having multiple internal data buses and memory bank interleaving Jul 6, 2006 Issued
Array ( [id] => 5919568 [patent_doc_number] => 20060239099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'No-precharge FAMOS cell and latch circuit in a memory device' [patent_app_type] => utility [patent_app_number] => 11/472670 [patent_app_country] => US [patent_app_date] => 2006-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20060239099.pdf [firstpage_image] =>[orig_patent_app_number] => 11472670 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/472670
No-precharge FAMOS cell and latch circuit in a memory device Jun 21, 2006 Issued
Array ( [id] => 870801 [patent_doc_number] => 07366029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'High-performance flash memory data transfer' [patent_app_type] => utility [patent_app_number] => 11/424581 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 15001 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366029.pdf [firstpage_image] =>[orig_patent_app_number] => 11424581 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/424581
High-performance flash memory data transfer Jun 15, 2006 Issued
Array ( [id] => 844900 [patent_doc_number] => 07388785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Method for extracting the distribution of charge stored in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/445551 [patent_app_country] => US [patent_app_date] => 2006-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9122 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388785.pdf [firstpage_image] =>[orig_patent_app_number] => 11445551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/445551
Method for extracting the distribution of charge stored in a semiconductor device Jun 1, 2006 Issued
Array ( [id] => 5600925 [patent_doc_number] => 20060291270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Ferroelectric memory device and display-driving IC' [patent_app_type] => utility [patent_app_number] => 11/445411 [patent_app_country] => US [patent_app_date] => 2006-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 14088 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20060291270.pdf [firstpage_image] =>[orig_patent_app_number] => 11445411 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/445411
Ferroelectric memory device and display-driving IC May 31, 2006 Issued
Array ( [id] => 838466 [patent_doc_number] => 07394694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Flash memory device with NAND architecture with reduced capacitive coupling effect' [patent_app_type] => utility [patent_app_number] => 11/445491 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5527 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/394/07394694.pdf [firstpage_image] =>[orig_patent_app_number] => 11445491 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/445491
Flash memory device with NAND architecture with reduced capacitive coupling effect May 30, 2006 Issued
Array ( [id] => 624903 [patent_doc_number] => 07139187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 11/442343 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8167 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139187.pdf [firstpage_image] =>[orig_patent_app_number] => 11442343 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/442343
Ferroelectric memory May 29, 2006 Issued
Array ( [id] => 5607133 [patent_doc_number] => 20060268649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Memory interface' [patent_app_type] => utility [patent_app_number] => 11/440159 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9559 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20060268649.pdf [firstpage_image] =>[orig_patent_app_number] => 11440159 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440159
Memory interface May 24, 2006 Abandoned
Array ( [id] => 5758650 [patent_doc_number] => 20060209595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Systems and methods for write protection of non-volatile memory devices' [patent_app_type] => utility [patent_app_number] => 11/438587 [patent_app_country] => US [patent_app_date] => 2006-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6404 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20060209595.pdf [firstpage_image] =>[orig_patent_app_number] => 11438587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/438587
Systems and methods for write protection of non-volatile memory devices May 21, 2006 Issued
Array ( [id] => 804701 [patent_doc_number] => 07423910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-09 [patent_title] => 'Semiconductor device including MOS transistors having floating gate and control gate' [patent_app_type] => utility [patent_app_number] => 11/436701 [patent_app_country] => US [patent_app_date] => 2006-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 52 [patent_no_of_words] => 24183 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/423/07423910.pdf [firstpage_image] =>[orig_patent_app_number] => 11436701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/436701
Semiconductor device including MOS transistors having floating gate and control gate May 18, 2006 Issued
Array ( [id] => 870768 [patent_doc_number] => 07366007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/435725 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3522 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366007.pdf [firstpage_image] =>[orig_patent_app_number] => 11435725 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/435725
Semiconductor memory device May 17, 2006 Issued
Array ( [id] => 5624110 [patent_doc_number] => 20060262615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/436419 [patent_app_country] => US [patent_app_date] => 2006-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4941 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20060262615.pdf [firstpage_image] =>[orig_patent_app_number] => 11436419 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/436419
Semiconductor memory device May 16, 2006 Issued
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