Search

Scott A. Smith

Examiner (ID: 231, Phone: (571)272-4469 , Office: P/3721 )

Most Active Art Unit
3721
Art Unit(s)
3731, 3727, 3204, 3205, 3616, 3721
Total Applications
3908
Issued Applications
3490
Pending Applications
120
Abandoned Applications
330

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19173844 [patent_doc_number] => 20240159818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => APPARATUS AND METHOD OF MEASURING RELIABILITY FOR FLASH MEMORY MATERIAL THROUGH A CURRENT MEASUREMENT [patent_app_type] => utility [patent_app_number] => 18/500841 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500841 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/500841
APPARATUS AND METHOD OF MEASURING RELIABILITY FOR FLASH MEMORY MATERIAL THROUGH A CURRENT MEASUREMENT Nov 1, 2023 Pending
Array ( [id] => 19348887 [patent_doc_number] => 20240257851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/499551 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499551 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/499551
MEMORY DEVICE AND METHOD OF OPERATING THE SAME Oct 31, 2023 Pending
Array ( [id] => 19646232 [patent_doc_number] => 20240420752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION [patent_app_type] => utility [patent_app_number] => 18/488269 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488269 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/488269
SEMICONDUCTOR SYSTEM FOR PERFORMING READ-MODIFY-WRITE OPERATION Oct 16, 2023 Issued
Array ( [id] => 19835467 [patent_doc_number] => 20250087253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MULTI-CIRCUIT CONTROL SYSTEM AND READING METHOD FOR STATUS INFORMATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/464262 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464262 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/464262
MULTI-CIRCUIT CONTROL SYSTEM AND READING METHOD FOR STATUS INFORMATION THEREOF Sep 10, 2023 Pending
Array ( [id] => 19531473 [patent_doc_number] => 20240355375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => MEMORY DEVICE INCLUDING ROW-HAMMER TRACKING CIRCUIT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/459418 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459418
Memory device including row-hammer tracking circuit and operating method thereof Aug 31, 2023 Issued
Array ( [id] => 18848451 [patent_doc_number] => 20230410855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY CHIP, MEMORY CONTROLLER AND OPERATING METHOD OF THE MEMORY CHIP [patent_app_type] => utility [patent_app_number] => 18/457742 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/457742
Memory chip, memory controller and operating method of the memory chip Aug 28, 2023 Issued
Array ( [id] => 18848469 [patent_doc_number] => 20230410873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Methods and Apparatus for Probabilistic Refresh in Volatile Memory Devices [patent_app_type] => utility [patent_app_number] => 18/456152 [patent_app_country] => US [patent_app_date] => 2023-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/456152
Methods and Apparatus for Probabilistic Refresh in Volatile Memory Devices Aug 24, 2023 Pending
Array ( [id] => 20317951 [patent_doc_number] => 12456506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Memory controller, memory system and operation of row-hammer tracking [patent_app_type] => utility [patent_app_number] => 18/453323 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 2316 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453323 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/453323
Memory controller, memory system and operation of row-hammer tracking Aug 21, 2023 Issued
Array ( [id] => 19007465 [patent_doc_number] => 20240071536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => ONE-TIME PROGRAMMABLE MEMORY BIT CELL [patent_app_type] => utility [patent_app_number] => 18/447826 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447826
ONE-TIME PROGRAMMABLE MEMORY BIT CELL Aug 9, 2023 Pending
Array ( [id] => 19252472 [patent_doc_number] => 20240203469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR APPARATUS INCLUDING A PLURALITY OF CLOCK PATHS AND A SEMICONDUCTOR SYSTEM USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/446946 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446946 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446946
Semiconductor apparatus including a plurality of clock paths and a semiconductor system using the same Aug 8, 2023 Issued
Array ( [id] => 20455783 [patent_doc_number] => 12518843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Failsafe memory card architecture using voltage driver output enable signals [patent_app_type] => utility [patent_app_number] => 18/362804 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 24985 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362804 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362804
Failsafe memory card architecture using voltage driver output enable signals Jul 30, 2023 Issued
Array ( [id] => 19436117 [patent_doc_number] => 20240304615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => TRANSCEIVER ARCHITECTURE WITH LOW KICK-BACK NOISE AND PAD CAP [patent_app_type] => utility [patent_app_number] => 18/362568 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362568 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362568
TRANSCEIVER ARCHITECTURE WITH LOW KICK-BACK NOISE AND PAD CAP Jul 30, 2023 Pending
Array ( [id] => 20375090 [patent_doc_number] => 12482532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Non-volatile memory with adjustable ramp rate [patent_app_type] => utility [patent_app_number] => 18/361840 [patent_app_country] => US [patent_app_date] => 2023-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 13644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361840
Non-volatile memory with adjustable ramp rate Jul 28, 2023 Issued
Array ( [id] => 19452373 [patent_doc_number] => 20240312503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MEMORY DEVICE PERFORMING PRECHARGE OPERATION, AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/358026 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358026 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358026
Memory device performing precharge operation, and operating method thereof Jul 24, 2023 Issued
Array ( [id] => 19221236 [patent_doc_number] => 20240185940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => STATISTICS BASED NON-VOLATILE MEMORY HEALTH MITIGATION [patent_app_type] => utility [patent_app_number] => 18/358567 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358567
Statistics based non-volatile memory health mitigation Jul 24, 2023 Issued
Array ( [id] => 20482621 [patent_doc_number] => 12531097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Storage controller, storage device, and method of training data [patent_app_type] => utility [patent_app_number] => 18/356274 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7087 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356274
Storage controller, storage device, and method of training data Jul 20, 2023 Issued
Array ( [id] => 19483699 [patent_doc_number] => 20240331741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/346359 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346359
Noise reduction in sense amplifiers for non-volatile memory Jul 2, 2023 Issued
Array ( [id] => 20581195 [patent_doc_number] => 12573449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Methods of testing nonvolatile memory devices and nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 18/341815 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 38 [patent_no_of_words] => 17966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341815
Methods of testing nonvolatile memory devices and nonvolatile memory devices Jun 26, 2023 Issued
Array ( [id] => 18926797 [patent_doc_number] => 20240029801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => MEMORY READ CALIBRATION BASED ON MEMORY DEVICE-ORIGINATED METRICS CHARACTERIZING VOLTAGE DISTRIBUTIONS [patent_app_type] => utility [patent_app_number] => 18/211802 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/211802
Memory read calibration based on memory device-originated metrics characterizing voltage distributions Jun 19, 2023 Issued
Array ( [id] => 20276491 [patent_doc_number] => 12446280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Method to access fibonacci anyons for topologicial quantum computation in a correlated two-dimensional electron system [patent_app_type] => utility [patent_app_number] => 18/337949 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5838 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337949
Method to access fibonacci anyons for topologicial quantum computation in a correlated two-dimensional electron system Jun 19, 2023 Issued
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