Scott A. Smith

Array ( [id] => 7094740 [patent_doc_number] => 20050127403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'RRAM circuit with temperature compensation' [patent_app_type] => utility [patent_app_number] => 11/031321 [patent_app_country] => US [patent_app_date] => 2005-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10995 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127403.pdf [firstpage_image] =>[orig_patent_app_number] => 11031321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5893687 [patent_doc_number] => 20060002225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Semiconductor memory device capable of stably setting mode register set and method therefor' [patent_app_type] => utility [patent_app_number] => 11/030485 [patent_app_country] => US [patent_app_date] => 2005-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2340 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20060002225.pdf [firstpage_image] =>[orig_patent_app_number] => 11030485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 697647 [patent_doc_number] => 07072221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Flash memory device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 11/014581 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2251 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/072/07072221.pdf [firstpage_image] =>[orig_patent_app_number] => 11014581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 614151 [patent_doc_number] => 07149120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations' [patent_app_type] => utility [patent_app_number] => 11/011304 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 14364 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/149/07149120.pdf [firstpage_image] =>[orig_patent_app_number] => 11011304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7245504 [patent_doc_number] => 20050141298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations' [patent_app_type] => utility [patent_app_number] => 11/011306 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20050141298.pdf [firstpage_image] =>[orig_patent_app_number] => 11011306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 952058 [patent_doc_number] => 06961265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Magnetic non-volatile memory coil layout architecture and process integration scheme' [patent_app_type] => utility [patent_app_number] => 11/010671 [patent_app_country] => US [patent_app_date] => 2004-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8457 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961265.pdf [firstpage_image] =>[orig_patent_app_number] => 11010671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7049584 [patent_doc_number] => 20050185471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Method of erasing NAND flash memory device' [patent_app_type] => utility [patent_app_number] => 11/007183 [patent_app_country] => US [patent_app_date] => 2004-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2774 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20050185471.pdf [firstpage_image] =>[orig_patent_app_number] => 11007183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7096344 [patent_doc_number] => 20050128802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Magnetic memory device and method for production thereof' [patent_app_type] => utility [patent_app_number] => 11/007381 [patent_app_country] => US [patent_app_date] => 2004-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14596 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128802.pdf [firstpage_image] =>[orig_patent_app_number] => 11007381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 689040 [patent_doc_number] => 07079429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/004391 [patent_app_country] => US [patent_app_date] => 2004-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4658 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/079/07079429.pdf [firstpage_image] =>[orig_patent_app_number] => 11004391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 959435 [patent_doc_number] => 06954383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-11 [patent_title] => 'On-system programmable and off-system programmable chip' [patent_app_type] => utility [patent_app_number] => 11/000956 [patent_app_country] => US [patent_app_date] => 2004-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3463 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/954/06954383.pdf [firstpage_image] =>[orig_patent_app_number] => 11000956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 684210 [patent_doc_number] => 07082068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Semiconductor memory device and method for adjusting internal voltage thereof' [patent_app_type] => utility [patent_app_number] => 11/000083 [patent_app_country] => US [patent_app_date] => 2004-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3840 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082068.pdf [firstpage_image] =>[orig_patent_app_number] => 11000083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 665593 [patent_doc_number] => 07102936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Internal voltage generating circuit for periphery, semiconductor memory device having the circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 10/999354 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/102/07102936.pdf [firstpage_image] =>[orig_patent_app_number] => 10999354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6930095 [patent_doc_number] => 20050281129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 10/997881 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7048 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20050281129.pdf [firstpage_image] =>[orig_patent_app_number] => 10997881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6916918 [patent_doc_number] => 20050094479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Internal voltage generating circuit for periphery, semiconductor memory device having the circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 10/999353 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4140 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20050094479.pdf [firstpage_image] =>[orig_patent_app_number] => 10999353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 543171 [patent_doc_number] => 07180812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Semiconductor device including voltage level conversion output circuit' [patent_app_type] => utility [patent_app_number] => 10/997891 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 15737 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/180/07180812.pdf [firstpage_image] =>[orig_patent_app_number] => 10997891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 569145 [patent_doc_number] => 07161862 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-09 [patent_title] => 'Low power asynchronous sense amp' [patent_app_type] => utility [patent_app_number] => 10/996283 [patent_app_country] => US [patent_app_date] => 2004-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2230 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/161/07161862.pdf [firstpage_image] =>[orig_patent_app_number] => 10996283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5746795 [patent_doc_number] => 20060109726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Method, apparatus, and computer program product for implementing enhanced dram interface checking' [patent_app_type] => utility [patent_app_number] => 10/994087 [patent_app_country] => US [patent_app_date] => 2004-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2716 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20060109726.pdf [firstpage_image] =>[orig_patent_app_number] => 10994087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5775496 [patent_doc_number] => 20060104136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Sense amplifier bitline boost circuit' [patent_app_type] => utility [patent_app_number] => 10/988787 [patent_app_country] => US [patent_app_date] => 2004-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12716 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20060104136.pdf [firstpage_image] =>[orig_patent_app_number] => 10988787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5900590 [patent_doc_number] => 20060044902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'MEMORY UNIT WITH SENSING CURRENT STABILIZATION' [patent_app_type] => utility [patent_app_number] => 10/904381 [patent_app_country] => US [patent_app_date] => 2004-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1329 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20060044902.pdf [firstpage_image] =>[orig_patent_app_number] => 10904381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 554553 [patent_doc_number] => 07167406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Image display device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 10/984083 [patent_app_country] => US [patent_app_date] => 2004-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167406.pdf [firstpage_image] =>[orig_patent_app_number] => 10984083 [rel_patent_id] =>[rel_patent_doc_number] =>)