Scott A. Smith

Array ( [id] => 7195410 [patent_doc_number] => 20040085811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Method for recording in a nonvolatile solid-state magnetic memory' [patent_app_type] => new [patent_app_number] => 10/619580 [patent_app_country] => US [patent_app_date] => 2003-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2509 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20040085811.pdf [firstpage_image] =>[orig_patent_app_number] => 10619580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7380146 [patent_doc_number] => 20040179415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Semiconductor memory device, control method thereof and control method of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/615911 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14152 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179415.pdf [firstpage_image] =>[orig_patent_app_number] => 10615911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 944806 [patent_doc_number] => 06967862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Semiconductor memory device with magnetic disturbance reduced' [patent_app_type] => utility [patent_app_number] => 10/615777 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 16654 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967862.pdf [firstpage_image] =>[orig_patent_app_number] => 10615777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7087711 [patent_doc_number] => 20050007823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'MEMORY CELL STRINGS IN A RESISTIVE CROSS POINT MEMORY CELL ARRAY' [patent_app_type] => utility [patent_app_number] => 10/614581 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6906 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007823.pdf [firstpage_image] =>[orig_patent_app_number] => 10614581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7374656 [patent_doc_number] => 20040027865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Method of reducing disturbs in non-volatile memory' [patent_app_type] => new [patent_app_number] => 10/613098 [patent_app_country] => US [patent_app_date] => 2003-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8132 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027865.pdf [firstpage_image] =>[orig_patent_app_number] => 10613098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1036147 [patent_doc_number] => 06876593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Method and apparatus for partial refreshing of DRAMS' [patent_app_type] => utility [patent_app_number] => 10/612585 [patent_app_country] => US [patent_app_date] => 2003-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7140 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/876/06876593.pdf [firstpage_image] =>[orig_patent_app_number] => 10612585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1091177 [patent_doc_number] => 06829154 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-07 [patent_title] => 'Layout of ferroelectric memory device' [patent_app_type] => B1 [patent_app_number] => 10/608487 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 5732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/829/06829154.pdf [firstpage_image] =>[orig_patent_app_number] => 10608487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7415670 [patent_doc_number] => 20040264280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'SUBARRAY CONTROL AND SUBARRAY CELL ACCESS IN A MEMORY MODULE' [patent_app_type] => new [patent_app_number] => 10/606585 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20040264280.pdf [firstpage_image] =>[orig_patent_app_number] => 10606585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1029491 [patent_doc_number] => 06882555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Bi-directional buffering for memory data lines' [patent_app_type] => utility [patent_app_number] => 10/464083 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2079 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/882/06882555.pdf [firstpage_image] =>[orig_patent_app_number] => 10464083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7244046 [patent_doc_number] => 20040257867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Magnetic memory' [patent_app_type] => new [patent_app_number] => 10/462979 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4567 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257867.pdf [firstpage_image] =>[orig_patent_app_number] => 10462979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 969923 [patent_doc_number] => 06940782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Memory system and control method for the same' [patent_app_type] => utility [patent_app_number] => 10/460987 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 59 [patent_no_of_words] => 25869 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940782.pdf [firstpage_image] =>[orig_patent_app_number] => 10460987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7628772 [patent_doc_number] => 06819587 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Thermal-assisted nanotip magnetic memory storage device' [patent_app_type] => B1 [patent_app_number] => 10/460785 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5789 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819587.pdf [firstpage_image] =>[orig_patent_app_number] => 10460785 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6808179 [patent_doc_number] => 20030198118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Method for reading a structural phase-change memory' [patent_app_type] => new [patent_app_number] => 10/458828 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5663 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198118.pdf [firstpage_image] =>[orig_patent_app_number] => 10458828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1061275 [patent_doc_number] => 06853573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Non-volatile semiconductor memory device for connecting to serial advanced technology attachment cable' [patent_app_type] => utility [patent_app_number] => 10/453989 [patent_app_country] => US [patent_app_date] => 2003-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1946 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853573.pdf [firstpage_image] =>[orig_patent_app_number] => 10453989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1135846 [patent_doc_number] => 06788616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/446734 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 19441 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/788/06788616.pdf [firstpage_image] =>[orig_patent_app_number] => 10446734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6700417 [patent_doc_number] => 20030223297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Semiconductor device and method for testing the same' [patent_app_type] => new [patent_app_number] => 10/446077 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6990 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20030223297.pdf [firstpage_image] =>[orig_patent_app_number] => 10446077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1249652 [patent_doc_number] => 06674676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architecture' [patent_app_type] => B1 [patent_app_number] => 10/444226 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5677 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674676.pdf [firstpage_image] =>[orig_patent_app_number] => 10444226 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 957008 [patent_doc_number] => 06956762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Method and system for data communication on a chip' [patent_app_type] => utility [patent_app_number] => 10/444477 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4613 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956762.pdf [firstpage_image] =>[orig_patent_app_number] => 10444477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7433874 [patent_doc_number] => 20040008545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Memory system' [patent_app_type] => new [patent_app_number] => 10/439085 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3692 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008545.pdf [firstpage_image] =>[orig_patent_app_number] => 10439085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1182050 [patent_doc_number] => 06747905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-08 [patent_title] => 'Voltage recovery switch' [patent_app_type] => B1 [patent_app_number] => 10/249887 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2341 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747905.pdf [firstpage_image] =>[orig_patent_app_number] => 10249887 [rel_patent_id] =>[rel_patent_doc_number] =>)