Search

Scott B. Geyer

Examiner (ID: 3879, Phone: (571)272-1958 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812, 2829, 2813, 4113
Total Applications
1967
Issued Applications
1781
Pending Applications
109
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9344950 [patent_doc_number] => 08664097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/220761 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 17828 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13220761 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/220761
Manufacturing method of semiconductor device Aug 29, 2011 Issued
Array ( [id] => 9026481 [patent_doc_number] => 08536063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'MRAM etching processes' [patent_app_type] => utility [patent_app_number] => 13/199490 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3578 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13199490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/199490
MRAM etching processes Aug 29, 2011 Issued
Array ( [id] => 8749396 [patent_doc_number] => 08415227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'High performance dielectric stack for DRAM capacitor' [patent_app_type] => utility [patent_app_number] => 13/220460 [patent_app_country] => US [patent_app_date] => 2011-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5623 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13220460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/220460
High performance dielectric stack for DRAM capacitor Aug 28, 2011 Issued
Array ( [id] => 8398289 [patent_doc_number] => 08268667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Memory device using ion implant isolated conductive metal oxide' [patent_app_type] => utility [patent_app_number] => 13/215895 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 16841 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215895 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215895
Memory device using ion implant isolated conductive metal oxide Aug 22, 2011 Issued
Array ( [id] => 10016383 [patent_doc_number] => 09059407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Method for manufacturing organic semiconductor thin film and monocryastalline organic semiconductor thin film' [patent_app_type] => utility [patent_app_number] => 13/816999 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4506 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13816999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/816999
Method for manufacturing organic semiconductor thin film and monocryastalline organic semiconductor thin film Aug 9, 2011 Issued
Array ( [id] => 8792140 [patent_doc_number] => 20130109109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'SUBSTRATE HEAT TREATING APPARATUS, TEMPERATURE CONTROL METHOD OF SUBSTRATE HEAT TREATING APPARATUS, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, TEMPERATURE CONTROL PROGRAM OF SUBSTRATE HEAT TREATING APPARATUS, AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/808338 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6514 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13808338 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/808338
Substrate heat treating apparatus, temperature control method of substrate heat treating apparatus, manufacturing method of semiconductor device, temperature control program of substrate heat treating apparatus, and recording medium Aug 2, 2011 Issued
Array ( [id] => 10144969 [patent_doc_number] => 09177781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Plasma processing method and manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/178759 [patent_app_country] => US [patent_app_date] => 2011-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5714 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13178759 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/178759
Plasma processing method and manufacturing method of semiconductor device Jul 7, 2011 Issued
Array ( [id] => 8932580 [patent_doc_number] => 08492279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Method of controlling critical dimensions of vias in a metallization system of a semiconductor device during silicon-ARC etch' [patent_app_type] => utility [patent_app_number] => 13/164899 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164899 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164899
Method of controlling critical dimensions of vias in a metallization system of a semiconductor device during silicon-ARC etch Jun 20, 2011 Issued
Array ( [id] => 9074292 [patent_doc_number] => 08551869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Roughening method and method for manufacturing light-emitting diode having roughened surface' [patent_app_type] => utility [patent_app_number] => 13/165095 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5816 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13165095 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/165095
Roughening method and method for manufacturing light-emitting diode having roughened surface Jun 20, 2011 Issued
Array ( [id] => 8566690 [patent_doc_number] => 20120329261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'MANUFACTURING METHOD FOR METAL GATE' [patent_app_type] => utility [patent_app_number] => 13/164781 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3681 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164781 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164781
Manufacturing method for metal gate using ion implantation Jun 20, 2011 Issued
Array ( [id] => 8834451 [patent_doc_number] => 08450207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Method of fabricating a cell contact and a digit line for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/164778 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 2450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164778 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164778
Method of fabricating a cell contact and a digit line for a semiconductor device Jun 20, 2011 Issued
Array ( [id] => 9273468 [patent_doc_number] => 08637400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Interconnect structures and methods for back end of the line integration' [patent_app_type] => utility [patent_app_number] => 13/164940 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164940 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164940
Interconnect structures and methods for back end of the line integration Jun 20, 2011 Issued
Array ( [id] => 8932591 [patent_doc_number] => 08492290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Fabrication of silicon oxide and oxynitride having sub-nanometer thickness' [patent_app_type] => utility [patent_app_number] => 13/164891 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 8772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164891 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164891
Fabrication of silicon oxide and oxynitride having sub-nanometer thickness Jun 20, 2011 Issued
Array ( [id] => 8968511 [patent_doc_number] => 08507322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Semiconductor substrate and method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/165063 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 7223 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13165063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/165063
Semiconductor substrate and method for manufacturing semiconductor device Jun 20, 2011 Issued
Array ( [id] => 8664971 [patent_doc_number] => 08378433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor device with a controlled cavity and method of formation' [patent_app_type] => utility [patent_app_number] => 13/160137 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13160137 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160137
Semiconductor device with a controlled cavity and method of formation Jun 13, 2011 Issued
Array ( [id] => 7480934 [patent_doc_number] => 20110233726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Semiconductor Device and Method of Forming Three-Dimensional Vertically Oriented Integrated Capacitors' [patent_app_type] => utility [patent_app_number] => 13/155312 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9868 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233726.pdf [firstpage_image] =>[orig_patent_app_number] => 13155312 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/155312
Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors Jun 6, 2011 Issued
Array ( [id] => 9937311 [patent_doc_number] => 08987116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Production of electronic switching devices' [patent_app_type] => utility [patent_app_number] => 13/701981 [patent_app_country] => US [patent_app_date] => 2011-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3202 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13701981 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/701981
Production of electronic switching devices Jun 2, 2011 Issued
Array ( [id] => 8178243 [patent_doc_number] => 08178935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'MEMS chip and package method thereof' [patent_app_type] => utility [patent_app_number] => 13/151361 [patent_app_country] => US [patent_app_date] => 2011-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 2392 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/178/08178935.pdf [firstpage_image] =>[orig_patent_app_number] => 13151361 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/151361
MEMS chip and package method thereof Jun 1, 2011 Issued
Array ( [id] => 8621745 [patent_doc_number] => 08354659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Post deposition method for regrowth of crystalline phase change material' [patent_app_type] => utility [patent_app_number] => 13/150705 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 3801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150705 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150705
Post deposition method for regrowth of crystalline phase change material May 31, 2011 Issued
Array ( [id] => 8841585 [patent_doc_number] => 20130137214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'METHOD FOR REMOVING RESIDUAL EXTRINSIC IMPURITIES IN AN N TYPE ZnO OR ZnMgO SUBSTRATE, FOR P-TYPE DOPING OF THIS SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/701621 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11377 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13701621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/701621
Method for removing residual extrinsic impurities in an N type ZnO or ZnMgO substrate, for P-type doping of this substrate May 31, 2011 Issued
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