Scott R. Kastler

Array ( [id] => 881606 [patent_doc_number] => 07355435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'On-chip detection of power supply vulnerabilities' [patent_app_type] => utility [patent_app_number] => 11/056822 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5721 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/355/07355435.pdf [firstpage_image] =>[orig_patent_app_number] => 11056822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 440446 [patent_doc_number] => 07259548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Testing circuits on substrate' [patent_app_type] => utility [patent_app_number] => 11/033349 [patent_app_country] => US [patent_app_date] => 2005-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3425 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259548.pdf [firstpage_image] =>[orig_patent_app_number] => 11033349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5129393 [patent_doc_number] => 20070205790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Semiconductor Device Testing Apparatus And Device Interface Board' [patent_app_type] => utility [patent_app_number] => 10/569902 [patent_app_country] => US [patent_app_date] => 2004-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8768 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20070205790.pdf [firstpage_image] =>[orig_patent_app_number] => 10569902 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 853721 [patent_doc_number] => 07378863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Synchronous semiconductor device, and inspection system and method for the same' [patent_app_type] => utility [patent_app_number] => 11/014789 [patent_app_country] => US [patent_app_date] => 2004-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9938 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/378/07378863.pdf [firstpage_image] =>[orig_patent_app_number] => 11014789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5646432 [patent_doc_number] => 20060132164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Using a parametric measurement unit to sense a voltage at a device under test' [patent_app_type] => utility [patent_app_number] => 11/016354 [patent_app_country] => US [patent_app_date] => 2004-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4426 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20060132164.pdf [firstpage_image] =>[orig_patent_app_number] => 11016354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 450171 [patent_doc_number] => 07250778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Wafer test apparatus including optical elements and method of using the test apparatus' [patent_app_type] => utility [patent_app_number] => 11/006184 [patent_app_country] => US [patent_app_date] => 2004-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5094 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/250/07250778.pdf [firstpage_image] =>[orig_patent_app_number] => 11006184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 477101 [patent_doc_number] => 07227373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'On-chip substrate regulator test mode' [patent_app_type] => utility [patent_app_number] => 11/004546 [patent_app_country] => US [patent_app_date] => 2004-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3227 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227373.pdf [firstpage_image] =>[orig_patent_app_number] => 11004546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5774723 [patent_doc_number] => 20060103369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Apparatus and method for making ground connection' [patent_app_type] => utility [patent_app_number] => 10/980301 [patent_app_country] => US [patent_app_date] => 2004-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1718 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20060103369.pdf [firstpage_image] =>[orig_patent_app_number] => 10980301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 444029 [patent_doc_number] => 07256606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Method for testing pixels for LCD TFT displays' [patent_app_type] => utility [patent_app_number] => 10/977510 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3444 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256606.pdf [firstpage_image] =>[orig_patent_app_number] => 10977510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 562192 [patent_doc_number] => 07161369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Method and apparatus for a wobble fixture probe for probing test access point structures' [patent_app_type] => utility [patent_app_number] => 10/978100 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 5326 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/161/07161369.pdf [firstpage_image] =>[orig_patent_app_number] => 10978100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 918639 [patent_doc_number] => 07323888 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-01-29 [patent_title] => 'System and method for use in functional failure analysis by induced stimulus' [patent_app_type] => utility [patent_app_number] => 10/967808 [patent_app_country] => US [patent_app_date] => 2004-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3199 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/323/07323888.pdf [firstpage_image] =>[orig_patent_app_number] => 10967808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7125525 [patent_doc_number] => 20050057269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Test method for electronic modules' [patent_app_type] => utility [patent_app_number] => 10/962930 [patent_app_country] => US [patent_app_date] => 2004-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4887 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057269.pdf [firstpage_image] =>[orig_patent_app_number] => 10962930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7125498 [patent_doc_number] => 20050057242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'SNR improvement by selective modulation' [patent_app_type] => utility [patent_app_number] => 10/955507 [patent_app_country] => US [patent_app_date] => 2004-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7349 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057242.pdf [firstpage_image] =>[orig_patent_app_number] => 10955507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6981488 [patent_doc_number] => 20050151556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Testing probe and testing jig' [patent_app_type] => utility [patent_app_number] => 10/952801 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2927 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20050151556.pdf [firstpage_image] =>[orig_patent_app_number] => 10952801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7208043 [patent_doc_number] => 20050258859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Determining leakage in matrix-structured electronic devices' [patent_app_type] => utility [patent_app_number] => 10/952601 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6315 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258859.pdf [firstpage_image] =>[orig_patent_app_number] => 10952601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 496727 [patent_doc_number] => 07212024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Inspection apparatus for liquid crystal drive substrates' [patent_app_type] => utility [patent_app_number] => 10/952375 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 13160 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/212/07212024.pdf [firstpage_image] =>[orig_patent_app_number] => 10952375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7243892 [patent_doc_number] => 20050073330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Adjusting device for chip adapter testing pin' [patent_app_type] => utility [patent_app_number] => 10/938600 [patent_app_country] => US [patent_app_date] => 2004-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1195 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073330.pdf [firstpage_image] =>[orig_patent_app_number] => 10938600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 419247 [patent_doc_number] => 07276924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Electrical connecting method' [patent_app_type] => utility [patent_app_number] => 10/937401 [patent_app_country] => US [patent_app_date] => 2004-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 36 [patent_no_of_words] => 11026 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276924.pdf [firstpage_image] =>[orig_patent_app_number] => 10937401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6939385 [patent_doc_number] => 20050112948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Mechanism for testing printed circuit board' [patent_app_type] => utility [patent_app_number] => 10/936508 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1857 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20050112948.pdf [firstpage_image] =>[orig_patent_app_number] => 10936508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5898994 [patent_doc_number] => 20060043997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'ENHANCED SAMPLING METHODOLOGY FOR SEMICONDUCTOR PROCESSING' [patent_app_type] => utility [patent_app_number] => 10/711201 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2154 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20060043997.pdf [firstpage_image] =>[orig_patent_app_number] => 10711201 [rel_patent_id] =>[rel_patent_doc_number] =>)