
Scott R. Wilson
Examiner (ID: 11542, Phone: (571)272-1925 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 901 |
| Issued Applications | 779 |
| Pending Applications | 16 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 281705
[patent_doc_number] => 07553704
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-30
[patent_title] => 'Antifuse element and method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/169951
[patent_app_country] => US
[patent_app_date] => 2005-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 6708
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/553/07553704.pdf
[firstpage_image] =>[orig_patent_app_number] => 11169951
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/169951 | Antifuse element and method of manufacture | Jun 27, 2005 | Issued |
Array
(
[id] => 612711
[patent_doc_number] => 07148108
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'Method of manufacturing semiconductor device having step gate'
[patent_app_type] => utility
[patent_app_number] => 11/159021
[patent_app_country] => US
[patent_app_date] => 2005-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 3196
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/148/07148108.pdf
[firstpage_image] =>[orig_patent_app_number] => 11159021
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/159021 | Method of manufacturing semiconductor device having step gate | Jun 21, 2005 | Issued |
Array
(
[id] => 910015
[patent_doc_number] => 07329563
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-12
[patent_title] => 'Method for fabrication of wafer level package incorporating dual compliant layers'
[patent_app_type] => utility
[patent_app_number] => 11/158136
[patent_app_country] => US
[patent_app_date] => 2005-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 5435
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/329/07329563.pdf
[firstpage_image] =>[orig_patent_app_number] => 11158136
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/158136 | Method for fabrication of wafer level package incorporating dual compliant layers | Jun 20, 2005 | Issued |
Array
(
[id] => 6931330
[patent_doc_number] => 20050282365
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-22
[patent_title] => 'Film formation apparatus and method for semiconductor process'
[patent_app_type] => utility
[patent_app_number] => 11/155629
[patent_app_country] => US
[patent_app_date] => 2005-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5238
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0282/20050282365.pdf
[firstpage_image] =>[orig_patent_app_number] => 11155629
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/155629 | Film formation apparatus and method for semiconductor process | Jun 19, 2005 | Abandoned |
Array
(
[id] => 307347
[patent_doc_number] => 07531413
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-12
[patent_title] => 'Method of forming transistor having channel region at sidewall of channel portion hole'
[patent_app_type] => utility
[patent_app_number] => 11/156271
[patent_app_country] => US
[patent_app_date] => 2005-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 7594
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/531/07531413.pdf
[firstpage_image] =>[orig_patent_app_number] => 11156271
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/156271 | Method of forming transistor having channel region at sidewall of channel portion hole | Jun 16, 2005 | Issued |
Array
(
[id] => 6952347
[patent_doc_number] => 20050227442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics'
[patent_app_type] => utility
[patent_app_number] => 11/148505
[patent_app_country] => US
[patent_app_date] => 2005-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 13263
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20050227442.pdf
[firstpage_image] =>[orig_patent_app_number] => 11148505
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/148505 | Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics | Jun 8, 2005 | Issued |
Array
(
[id] => 32497
[patent_doc_number] => 07790556
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-07
[patent_title] => 'Integration of high k gate dielectric'
[patent_app_type] => utility
[patent_app_number] => 11/148721
[patent_app_country] => US
[patent_app_date] => 2005-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 9279
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/790/07790556.pdf
[firstpage_image] =>[orig_patent_app_number] => 11148721
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/148721 | Integration of high k gate dielectric | Jun 8, 2005 | Issued |
Array
(
[id] => 6978045
[patent_doc_number] => 20050287763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/149702
[patent_app_country] => US
[patent_app_date] => 2005-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6736
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0287/20050287763.pdf
[firstpage_image] =>[orig_patent_app_number] => 11149702
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/149702 | Method of manufacturing a semiconductor device with a self-aligned polysilicon electrode | Jun 8, 2005 | Issued |
Array
(
[id] => 6949813
[patent_doc_number] => 20050224907
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Isolation structure with nitrogen-containing liner and methods of manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/146661
[patent_app_country] => US
[patent_app_date] => 2005-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224907.pdf
[firstpage_image] =>[orig_patent_app_number] => 11146661
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/146661 | Isolation structure with nitrogen-containing liner and methods of manufacture | Jun 6, 2005 | Abandoned |
Array
(
[id] => 6966611
[patent_doc_number] => 20050233508
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/146002
[patent_app_country] => US
[patent_app_date] => 2005-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 13906
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0233/20050233508.pdf
[firstpage_image] =>[orig_patent_app_number] => 11146002
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/146002 | Semiconductor device and method of manufacturing the same | Jun 6, 2005 | Issued |
Array
(
[id] => 6958665
[patent_doc_number] => 20050215035
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-29
[patent_title] => 'Field effect transistor with metal oxide gate insulator and sidewall insulating film'
[patent_app_type] => utility
[patent_app_number] => 11/136492
[patent_app_country] => US
[patent_app_date] => 2005-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7556
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0215/20050215035.pdf
[firstpage_image] =>[orig_patent_app_number] => 11136492
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/136492 | Field effect transistor with metal oxide gate insulator and sidewall insulating film | May 24, 2005 | Abandoned |
Array
(
[id] => 542028
[patent_doc_number] => 07169676
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-01-30
[patent_title] => 'Semiconductor devices and methods for forming the same including contacting gate to source'
[patent_app_type] => utility
[patent_app_number] => 11/135711
[patent_app_country] => US
[patent_app_date] => 2005-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 5008
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/169/07169676.pdf
[firstpage_image] =>[orig_patent_app_number] => 11135711
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/135711 | Semiconductor devices and methods for forming the same including contacting gate to source | May 22, 2005 | Issued |
Array
(
[id] => 5631727
[patent_doc_number] => 20060148197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Method for forming shallow trench isolation with rounded corners by using a clean process'
[patent_app_type] => utility
[patent_app_number] => 11/134372
[patent_app_country] => US
[patent_app_date] => 2005-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2458
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20060148197.pdf
[firstpage_image] =>[orig_patent_app_number] => 11134372
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/134372 | Method for forming shallow trench isolation with rounded corners by using a clean process | May 22, 2005 | Abandoned |
Array
(
[id] => 7108532
[patent_doc_number] => 20050205985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Microelectronic assembly formation with releasable leads'
[patent_app_type] => utility
[patent_app_number] => 11/131973
[patent_app_country] => US
[patent_app_date] => 2005-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8916
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20050205985.pdf
[firstpage_image] =>[orig_patent_app_number] => 11131973
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/131973 | Microelectronic assembly formation with releasable leads | May 17, 2005 | Abandoned |
Array
(
[id] => 103743
[patent_doc_number] => 07723768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Asymmetric recessed gate MOSFET and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/130642
[patent_app_country] => US
[patent_app_date] => 2005-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3474
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/723/07723768.pdf
[firstpage_image] =>[orig_patent_app_number] => 11130642
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/130642 | Asymmetric recessed gate MOSFET and method for manufacturing the same | May 15, 2005 | Issued |
Array
(
[id] => 270429
[patent_doc_number] => 07563665
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Semiconductor device and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/129511
[patent_app_country] => US
[patent_app_date] => 2005-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 44
[patent_no_of_words] => 12933
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/563/07563665.pdf
[firstpage_image] =>[orig_patent_app_number] => 11129511
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/129511 | Semiconductor device and method for manufacturing semiconductor device | May 12, 2005 | Issued |
Array
(
[id] => 612715
[patent_doc_number] => 07148112
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'Method for manufacturing semiconductor device including a recess channel'
[patent_app_type] => utility
[patent_app_number] => 11/121652
[patent_app_country] => US
[patent_app_date] => 2005-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 2495
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/148/07148112.pdf
[firstpage_image] =>[orig_patent_app_number] => 11121652
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/121652 | Method for manufacturing semiconductor device including a recess channel | May 3, 2005 | Issued |
Array
(
[id] => 8340024
[patent_doc_number] => 08241946
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-14
[patent_title] => 'Method of forming an organic semiconducting device by a melt technique'
[patent_app_type] => utility
[patent_app_number] => 11/568192
[patent_app_country] => US
[patent_app_date] => 2005-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 9356
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11568192
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/568192 | Method of forming an organic semiconducting device by a melt technique | Apr 21, 2005 | Issued |
Array
(
[id] => 5851276
[patent_doc_number] => 20060234467
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-19
[patent_title] => 'Method of forming trench isolation in a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/106822
[patent_app_country] => US
[patent_app_date] => 2005-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2847
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0234/20060234467.pdf
[firstpage_image] =>[orig_patent_app_number] => 11106822
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/106822 | Method of forming trench isolation in a semiconductor device | Apr 14, 2005 | Abandoned |
Array
(
[id] => 5843629
[patent_doc_number] => 20060121714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-08
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/103562
[patent_app_country] => US
[patent_app_date] => 2005-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 14161
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0121/20060121714.pdf
[firstpage_image] =>[orig_patent_app_number] => 11103562
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/103562 | Semiconductor device and method for manufacturing the same | Apr 11, 2005 | Abandoned |