Scott R. Wilson

Array ( [id] => 1089119 [patent_doc_number] => 06828200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Multistage deposition that incorporates nitrogen via an intermediate step' [patent_app_type] => B2 [patent_app_number] => 10/336441 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5552 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828200.pdf [firstpage_image] =>[orig_patent_app_number] => 10336441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1116922 [patent_doc_number] => 06800907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-05 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/330341 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3991 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/800/06800907.pdf [firstpage_image] =>[orig_patent_app_number] => 10330341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7450245 [patent_doc_number] => 20040067627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Dry lithograpy method and method of forming gate pattern using the same' [patent_app_type] => new [patent_app_number] => 10/329545 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20040067627.pdf [firstpage_image] =>[orig_patent_app_number] => 10329545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6711256 [patent_doc_number] => 20030171005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-11 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/321501 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5447 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20030171005.pdf [firstpage_image] =>[orig_patent_app_number] => 10321501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6649690 [patent_doc_number] => 20030104677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method of fabricating a semiconductor device using trench isolation method including hydrogen annealing step' [patent_app_type] => new [patent_app_number] => 10/319534 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6354 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20030104677.pdf [firstpage_image] =>[orig_patent_app_number] => 10319534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6758853 [patent_doc_number] => 20030122214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'High performance PD SOI tunneling-biased mosfet' [patent_app_type] => new [patent_app_number] => 10/316601 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1588 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122214.pdf [firstpage_image] =>[orig_patent_app_number] => 10316601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6761465 [patent_doc_number] => 20030124827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'System for preventing excess silicon consumption in ultra shallow junctions' [patent_app_type] => new [patent_app_number] => 10/315499 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20030124827.pdf [firstpage_image] =>[orig_patent_app_number] => 10315499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7287786 [patent_doc_number] => 20040109299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Electronic array and methods for fabricating same' [patent_app_type] => new [patent_app_number] => 10/313078 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3508 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109299.pdf [firstpage_image] =>[orig_patent_app_number] => 10313078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 810558 [patent_doc_number] => 07417315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Negative thermal expansion system (NTEs) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging' [patent_app_type] => utility [patent_app_number] => 10/310532 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 8692 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/417/07417315.pdf [firstpage_image] =>[orig_patent_app_number] => 10310532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6658103 [patent_doc_number] => 20030133762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Semiconductor wafer transport method and semiconductor wafer transport apparatus using the same' [patent_app_type] => new [patent_app_number] => 10/303816 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9821 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133762.pdf [firstpage_image] =>[orig_patent_app_number] => 10303816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6657217 [patent_doc_number] => 20030077866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Method of reducing silicone oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness with other transistors of the hybrid circuit' [patent_app_type] => new [patent_app_number] => 10/304631 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6517 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20030077866.pdf [firstpage_image] =>[orig_patent_app_number] => 10304631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8689843 [patent_doc_number] => 08389370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Radiation-tolerant integrated circuit device and method for fabricating' [patent_app_type] => utility [patent_app_number] => 11/194295 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2778 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11194295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 408132 [patent_doc_number] => 07285449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source /drain and semiconductor device manufactured by the method' [patent_app_type] => utility [patent_app_number] => 10/298641 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 52 [patent_no_of_words] => 7997 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/285/07285449.pdf [firstpage_image] =>[orig_patent_app_number] => 10298641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 493332 [patent_doc_number] => 07211451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Process for producing a component module' [patent_app_type] => utility [patent_app_number] => 10/298772 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 2767 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211451.pdf [firstpage_image] =>[orig_patent_app_number] => 10298772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7610975 [patent_doc_number] => 06841882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Elastomer interposer for grid array packages and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/293564 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 7741 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841882.pdf [firstpage_image] =>[orig_patent_app_number] => 10293564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6674413 [patent_doc_number] => 20030060016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => new [patent_app_number] => 10/293741 [patent_app_country] => US [patent_app_date] => 2002-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3184 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20030060016.pdf [firstpage_image] =>[orig_patent_app_number] => 10293741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6843238 [patent_doc_number] => 20030148585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method of preventing leakage current of a metal-oxide semiconductor transistor' [patent_app_type] => new [patent_app_number] => 10/065717 [patent_app_country] => US [patent_app_date] => 2002-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1933 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148585.pdf [firstpage_image] =>[orig_patent_app_number] => 10065717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1273777 [patent_doc_number] => 06649462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Semiconductor device and method of manufacturing the same including T-shaped gate' [patent_app_type] => B2 [patent_app_number] => 10/292579 [patent_app_country] => US [patent_app_date] => 2002-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3486 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649462.pdf [firstpage_image] =>[orig_patent_app_number] => 10292579 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1273864 [patent_doc_number] => 06649478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => B2 [patent_app_number] => 10/283981 [patent_app_country] => US [patent_app_date] => 2002-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3531 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649478.pdf [firstpage_image] =>[orig_patent_app_number] => 10283981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7203790 [patent_doc_number] => 20040087094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Semiconductor component and method of manufacture' [patent_app_type] => new [patent_app_number] => 10/284654 [patent_app_country] => US [patent_app_date] => 2002-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5498 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087094.pdf [firstpage_image] =>[orig_patent_app_number] => 10284654 [rel_patent_id] =>[rel_patent_doc_number] =>)