
Scott R. Wilson
Examiner (ID: 11542, Phone: (571)272-1925 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 901 |
| Issued Applications | 779 |
| Pending Applications | 16 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1424144
[patent_doc_number] => 06515320
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-02-04
[patent_title] => 'Semiconductor device and method of manufacturing the same including thicker insulating layer on lower part of electrode'
[patent_app_type] => B1
[patent_app_number] => 09/986362
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[pdf_file] => patents/06/515/06515320.pdf
[firstpage_image] =>[orig_patent_app_number] => 09986362
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/986362 | Semiconductor device and method of manufacturing the same including thicker insulating layer on lower part of electrode | Nov 7, 2001 | Issued |
Array
(
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[patent_doc_number] => 20020048885
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[patent_issue_date] => 2002-04-25
[patent_title] => 'Method for fabricating semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/985881 | Method for fabricating semiconductor device | Nov 5, 2001 | Issued |
Array
(
[id] => 229220
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[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Light emitting or light receiving semiconductor module and method for manufacturing same'
[patent_app_type] => utility
[patent_app_number] => 10/492561
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[patent_app_date] => 2001-10-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/492561 | Light emitting or light receiving semiconductor module and method for manufacturing same | Oct 18, 2001 | Issued |
Array
(
[id] => 6657228
[patent_doc_number] => 20030077877
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[patent_issue_date] => 2003-04-24
[patent_title] => 'Systems and methods for electrically isolating portions of wafers'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/035792 | Systems and methods for electrically isolating portions of wafers | Oct 17, 2001 | Issued |
Array
(
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[patent_issue_date] => 2002-10-17
[patent_title] => 'Method of manufacturing semiconductor device, and semiconductor device having memory cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/976341 | Method of manufacturing semiconductor device, and semiconductor device having memory cell | Oct 14, 2001 | Issued |
Array
(
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[patent_issue_date] => 2002-12-10
[patent_title] => 'Variable threshold voltage double gated transistors and method of fabrication'
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Array
(
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[patent_issue_date] => 2004-02-03
[patent_title] => 'Multiple operating voltage vertical replacement-gate (VRG) transistor'
[patent_app_type] => B2
[patent_app_number] => 09/961477
[patent_app_country] => US
[patent_app_date] => 2001-09-21
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[firstpage_image] =>[orig_patent_app_number] => 09961477
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/961477 | Multiple operating voltage vertical replacement-gate (VRG) transistor | Sep 20, 2001 | Issued |
Array
(
[id] => 6406001
[patent_doc_number] => 20020037639
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-03-28
[patent_title] => 'Method for farbricating field-effect transistors in integrated semiconductor circuits and integrated semiconductor circuit fabricated with a field-effect transistor of this type'
[patent_app_type] => new
[patent_app_number] => 09/951241
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0037/20020037639.pdf
[firstpage_image] =>[orig_patent_app_number] => 09951241
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/951241 | Method for fabricating field-effect transistors in integrated semiconductor circuits and integrated semiconductor circuit fabricated with a field-effect transistor of this type including a dual gate | Sep 11, 2001 | Issued |
Array
(
[id] => 1440063
[patent_doc_number] => 06495431
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[patent_issue_date] => 2002-12-17
[patent_title] => 'Semiconductor device and method for manufacturing the same that includes a dual oxidation'
[patent_app_type] => B2
[patent_app_number] => 09/919921
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/919921 | Semiconductor device and method for manufacturing the same that includes a dual oxidation | Aug 1, 2001 | Issued |
Array
(
[id] => 1040569
[patent_doc_number] => 06869867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING METAL SILICIDE FILMS FORMED TO COVER GATE ELECTRODE AND SOURCE-DRAIN DIFFUSION LAYERS AND METHOD OF MANUFACTURING THE SAME WHEREIN THE SILICIDE ON GATE IS THICKER THAN ON SOURCE-DRAIN'
[patent_app_type] => utility
[patent_app_number] => 09/916530
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/916530 | SEMICONDUCTOR DEVICE COMPRISING METAL SILICIDE FILMS FORMED TO COVER GATE ELECTRODE AND SOURCE-DRAIN DIFFUSION LAYERS AND METHOD OF MANUFACTURING THE SAME WHEREIN THE SILICIDE ON GATE IS THICKER THAN ON SOURCE-DRAIN | Jul 29, 2001 | Issued |
Array
(
[id] => 6884946
[patent_doc_number] => 20010039108
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[patent_issue_date] => 2001-11-08
[patent_title] => 'Method for forming gate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/901211 | Method for forming gate | Jul 8, 2001 | Abandoned |
Array
(
[id] => 1532522
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[patent_title] => 'Method for forming a field oxide film on a semiconductor device including mask spacer and rounding edge'
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Array
(
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[patent_title] => 'Semiconductor device and method of manufacturing the same'
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Array
(
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[patent_title] => 'Divot reduction in SIMOX layers'
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Array
(
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[patent_title] => 'Semiconductor apparatus, manufacturing method therefor, solid state image device and manufacturing method therefor'
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Array
(
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Array
(
[id] => 6385304
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/854120 | Method of manufacturing liquid crystal display device | May 9, 2001 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/850162 | Semiconductor integrated circuit device and a method of manufacturing the same | May 7, 2001 | Issued |