
Scott R. Wilson
Examiner (ID: 11542, Phone: (571)272-1925 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 901 |
| Issued Applications | 779 |
| Pending Applications | 16 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8139851
[patent_doc_number] => 20120094474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-19
[patent_title] => 'METHOD FOR EQUIPPING AN EPITAXY REACTOR'
[patent_app_type] => utility
[patent_app_number] => 13/378340
[patent_app_country] => US
[patent_app_date] => 2010-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
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[pdf_file] => publications/A1/0094/20120094474.pdf
[firstpage_image] =>[orig_patent_app_number] => 13378340
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/378340 | Method for equipping an epitaxy reactor | Jun 7, 2010 | Issued |
Array
(
[id] => 4608697
[patent_doc_number] => 07993952
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-09
[patent_title] => 'Charge transfer device'
[patent_app_type] => utility
[patent_app_number] => 12/772666
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/993/07993952.pdf
[firstpage_image] =>[orig_patent_app_number] => 12772666
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/772666 | Charge transfer device | May 2, 2010 | Issued |
Array
(
[id] => 6493951
[patent_doc_number] => 20100200860
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'Thin Film Transistor Array Panel and Manufacturing Method Thereof'
[patent_app_type] => utility
[patent_app_number] => 12/763904
[patent_app_country] => US
[patent_app_date] => 2010-04-20
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[pdf_file] => publications/A1/0200/20100200860.pdf
[firstpage_image] =>[orig_patent_app_number] => 12763904
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/763904 | Thin Film Transistor Array Panel and Manufacturing Method Thereof | Apr 19, 2010 | Abandoned |
Array
(
[id] => 6265588
[patent_doc_number] => 20100297854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-25
[patent_title] => 'HIGH THROUGHPUT SELECTIVE OXIDATION OF SILICON AND POLYSILICON USING PLASMA AT ROOM TEMPERATURE'
[patent_app_type] => utility
[patent_app_number] => 12/763653
[patent_app_country] => US
[patent_app_date] => 2010-04-20
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/763653 | HIGH THROUGHPUT SELECTIVE OXIDATION OF SILICON AND POLYSILICON USING PLASMA AT ROOM TEMPERATURE | Apr 19, 2010 | Abandoned |
Array
(
[id] => 6235487
[patent_doc_number] => 20100267191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'PLASMA ENHANCED THERMAL EVAPORATOR'
[patent_app_type] => utility
[patent_app_number] => 12/763856
[patent_app_country] => US
[patent_app_date] => 2010-04-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/763856 | PLASMA ENHANCED THERMAL EVAPORATOR | Apr 19, 2010 | Abandoned |
Array
(
[id] => 8858444
[patent_doc_number] => 08460979
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-11
[patent_title] => 'Method of fabricating a backside illuminated image sensor'
[patent_app_type] => utility
[patent_app_number] => 12/762442
[patent_app_country] => US
[patent_app_date] => 2010-04-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/762442 | Method of fabricating a backside illuminated image sensor | Apr 18, 2010 | Issued |
Array
(
[id] => 6570063
[patent_doc_number] => 20100273310
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-28
[patent_title] => 'METHOD OF MANUFACTURING SOI SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/762675
[patent_app_country] => US
[patent_app_date] => 2010-04-19
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[pdf_file] => publications/A1/0273/20100273310.pdf
[firstpage_image] =>[orig_patent_app_number] => 12762675
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/762675 | Method of manufacturing SOI substrate | Apr 18, 2010 | Issued |
Array
(
[id] => 4533493
[patent_doc_number] => 07888193
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Semiconductor device with mushroom electrode and manufacture method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/726761
[patent_app_country] => US
[patent_app_date] => 2010-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/07/888/07888193.pdf
[firstpage_image] =>[orig_patent_app_number] => 12726761
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/726761 | Semiconductor device with mushroom electrode and manufacture method thereof | Mar 17, 2010 | Issued |
Array
(
[id] => 6507527
[patent_doc_number] => 20100219469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'MASK ROM CELL STRUCTURE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/712400
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[firstpage_image] =>[orig_patent_app_number] => 12712400
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/712400 | MASK ROM CELL STRUCTURE AND METHOD OF FABRICATING THE SAME | Feb 24, 2010 | Abandoned |
Array
(
[id] => 6540860
[patent_doc_number] => 20100221911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'PROVIDING SUPERIOR ELECTROMIGRATION PERFORMANCE AND REDUCING DETERIORATION OF SENSITIVE LOW-K DIELECTRICS IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/711373
[patent_app_country] => US
[patent_app_date] => 2010-02-24
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[pdf_file] => publications/A1/0221/20100221911.pdf
[firstpage_image] =>[orig_patent_app_number] => 12711373
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711373 | Providing superior electromigration performance and reducing deterioration of sensitive low-k dielectrics in metallization systems of semiconductor devices | Feb 23, 2010 | Issued |
Array
(
[id] => 8329047
[patent_doc_number] => 08237146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-07
[patent_title] => 'Memory cell with silicon-containing carbon switching layer and methods for forming the same'
[patent_app_type] => utility
[patent_app_number] => 12/711810
[patent_app_country] => US
[patent_app_date] => 2010-02-24
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Array
(
[id] => 6042366
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[patent_title] => 'SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE AND METHOD OF FORMING THE SOI STRUCTURE USING A BULK SEMICONDUCTOR STARTING WAFER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/710380 | Semiconductor-on-insulator (SOI) structure and method of forming the SOI structure using a bulk semiconductor starting wafer | Feb 22, 2010 | Issued |
Array
(
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[patent_title] => 'Semiconductor packaging system with an aligned interconnect and method of manufacture thereof'
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Array
(
[id] => 6047728
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[patent_issue_date] => 2011-08-25
[patent_title] => 'METHOD FOR FORMING A SPLIT-GATE MEMORY CELL'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/710111 | Method for forming a split-gate memory cell | Feb 21, 2010 | Issued |
Array
(
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[patent_title] => 'Method for Improving Performance of Etch Stop Layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/708160 | Method for Improving Performance of Etch Stop Layer | Feb 17, 2010 | Abandoned |
Array
(
[id] => 8294309
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[patent_title] => 'Methods for forming barrier regions within regions of insulating material resulting in outgassing paths from the insulating material and related devices'
[patent_app_type] => utility
[patent_app_number] => 12/707150
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Array
(
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[patent_title] => 'Direct IMS (injection molded solder) without a mask for forming solder bumps on substrates'
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/704502 | Method for manufacturing twin bit structure cell with Al2O3/nano-crystalline Si layer | Feb 10, 2010 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/703252 | Manufacturing method of semiconductor device | Feb 9, 2010 | Issued |