
Scott R. Wilson
Examiner (ID: 11542, Phone: (571)272-1925 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826 |
| Total Applications | 901 |
| Issued Applications | 779 |
| Pending Applications | 16 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7773780
[patent_doc_number] => 08119425
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[patent_kind] => B2
[patent_issue_date] => 2012-02-21
[patent_title] => 'Method of forming magnetic memory device'
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[pdf_file] => patents/08/119/08119425.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/655862 | Method of forming magnetic memory device | Jan 7, 2010 | Issued |
Array
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[patent_kind] => A1
[patent_issue_date] => 2011-07-07
[patent_title] => 'METHOD OF MAKING A SEMICONDUCTOR STRUCTURE USEFUL IN MAKING A SPLIT GATE NON-VOLATILE MEMORY CELL'
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Array
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[patent_title] => 'Method of fabricating semiconductor device'
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[patent_title] => 'METHOD AND APPARATUS FOR FABRICATING SEMICONDUCTOR DEVICE'
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[patent_title] => 'Methods of manufacturing charge trap-type non-volatile memory devices'
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Array
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[patent_title] => 'Semiconductor device and manufacturing method thereof'
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Array
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[patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR MEMORY DEVICE'
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Array
(
[id] => 7965863
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[patent_issue_date] => 2011-05-10
[patent_title] => 'Partial implantation method for semiconductor manufacturing'
[patent_app_type] => utility
[patent_app_number] => 12/646196
[patent_app_country] => US
[patent_app_date] => 2009-12-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/646196 | Partial implantation method for semiconductor manufacturing | Dec 22, 2009 | Issued |
Array
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[patent_title] => 'Apparatus and methods for determining overlay and uses of same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/560229 | Apparatus and methods for determining overlay and uses of same | Sep 14, 2009 | Issued |
Array
(
[id] => 6025010
[patent_doc_number] => 20110053336
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[patent_title] => 'METHOD FOR SELECTIVE DEPOSITION OF DIELECTRIC LAYERS ON SEMICONDUCTOR STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 12/553261
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Array
(
[id] => 6597328
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Array
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[patent_title] => 'Reducing photoresist layer degradation in plasma immersion ion implantation'
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/544931 | Methods for fabricating bulk FinFET devices having deep trench isolation | Aug 19, 2009 | Issued |
Array
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[patent_title] => 'PROTECTIVE LAYERS SUITABLE FOR EXHAUST GASES FOR HIGH-TEMPERATURE CHEMFET EXHAUST GAS SENSORS'
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Array
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Array
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Array
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