Search

Scott T. Baderman

Supervisory Patent Examiner (ID: 7196, Phone: (571)272-3644 , Office: P/2144 )

Most Active Art Unit
2785
Art Unit(s)
2785, 2184, 2114, 2144, 2413, 2113, 2118
Total Applications
584
Issued Applications
474
Pending Applications
52
Abandoned Applications
59

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6414182 [patent_doc_number] => 20020038438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Information processing unit with failure information management function and failure information management method four' [patent_app_type] => new [patent_app_number] => 09/962324 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3805 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20020038438.pdf [firstpage_image] =>[orig_patent_app_number] => 09962324 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962324
Information processing unit with failure information management function and failure information management method four Sep 25, 2001 Abandoned
Array ( [id] => 995984 [patent_doc_number] => 06918066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Method and system for evaluating applications on different user agents' [patent_app_type] => utility [patent_app_number] => 09/963714 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6452 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/918/06918066.pdf [firstpage_image] =>[orig_patent_app_number] => 09963714 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963714
Method and system for evaluating applications on different user agents Sep 25, 2001 Issued
Array ( [id] => 6839943 [patent_doc_number] => 20030037283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Electing a master server using election periodic timer in fault-tolerant distributed dynamic network systems' [patent_app_type] => new [patent_app_number] => 09/961379 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6315 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20030037283.pdf [firstpage_image] =>[orig_patent_app_number] => 09961379 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961379
Electing a master server using election periodic timer in fault-tolerant distributed dynamic network systems Sep 24, 2001 Issued
Array ( [id] => 1062289 [patent_doc_number] => 06854073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Debugger program time monitor' [patent_app_type] => utility [patent_app_number] => 09/962866 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5883 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/854/06854073.pdf [firstpage_image] =>[orig_patent_app_number] => 09962866 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962866
Debugger program time monitor Sep 24, 2001 Issued
Array ( [id] => 766099 [patent_doc_number] => 07013410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'User support' [patent_app_type] => utility [patent_app_number] => 09/962839 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10123 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/013/07013410.pdf [firstpage_image] =>[orig_patent_app_number] => 09962839 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962839
User support Sep 23, 2001 Issued
Array ( [id] => 955191 [patent_doc_number] => 06959399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Selective automated power cycling of faulty disk in intelligent disk array enclosure for error recovery' [patent_app_type] => utility [patent_app_number] => 09/961950 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9507 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/959/06959399.pdf [firstpage_image] =>[orig_patent_app_number] => 09961950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961950
Selective automated power cycling of faulty disk in intelligent disk array enclosure for error recovery Sep 23, 2001 Issued
Array ( [id] => 6675930 [patent_doc_number] => 20030061533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Multi-device link aggregation' [patent_app_type] => new [patent_app_number] => 09/961471 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7417 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20030061533.pdf [firstpage_image] =>[orig_patent_app_number] => 09961471 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961471
Multi-device link aggregation Sep 23, 2001 Issued
Array ( [id] => 975543 [patent_doc_number] => 06938183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Fault tolerant processing architecture' [patent_app_type] => utility [patent_app_number] => 09/960152 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7165 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/938/06938183.pdf [firstpage_image] =>[orig_patent_app_number] => 09960152 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/960152
Fault tolerant processing architecture Sep 20, 2001 Issued
Array ( [id] => 1085082 [patent_doc_number] => 06834359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Method and system for testing a processor' [patent_app_type] => B2 [patent_app_number] => 09/960154 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3683 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/834/06834359.pdf [firstpage_image] =>[orig_patent_app_number] => 09960154 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/960154
Method and system for testing a processor Sep 20, 2001 Issued
Array ( [id] => 6689838 [patent_doc_number] => 20030033564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Apparatus and method for processor power measurement in a digital signal processor using trace data and simulation techniques' [patent_app_type] => new [patent_app_number] => 09/924800 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2374 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033564.pdf [firstpage_image] =>[orig_patent_app_number] => 09924800 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/924800
Apparatus and method for processor power measurement in a digital signal processor using trace data and simulation techniques Aug 7, 2001 Issued
Array ( [id] => 1059038 [patent_doc_number] => 06857084 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-15 [patent_title] => 'Multiprocessor system and method for simultaneously placing all processors into debug mode' [patent_app_type] => utility [patent_app_number] => 09/922755 [patent_app_country] => US [patent_app_date] => 2001-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5614 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857084.pdf [firstpage_image] =>[orig_patent_app_number] => 09922755 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922755
Multiprocessor system and method for simultaneously placing all processors into debug mode Aug 5, 2001 Issued
Array ( [id] => 1109940 [patent_doc_number] => 06813732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Trace circuit' [patent_app_type] => B2 [patent_app_number] => 09/920930 [patent_app_country] => US [patent_app_date] => 2001-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4543 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813732.pdf [firstpage_image] =>[orig_patent_app_number] => 09920930 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/920930
Trace circuit Aug 2, 2001 Issued
Array ( [id] => 6555880 [patent_doc_number] => 20020194511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Apparatus and method for central processing unit power measurement in a digital signal processor' [patent_app_type] => new [patent_app_number] => 09/920193 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1685 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20020194511.pdf [firstpage_image] =>[orig_patent_app_number] => 09920193 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/920193
Apparatus and method for central processing unit power measurement in a digital signal processor Jul 31, 2001 Abandoned
Array ( [id] => 1055858 [patent_doc_number] => 06859893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Service guru system and method for automated proactive and reactive computer system analysis' [patent_app_type] => utility [patent_app_number] => 09/920531 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9188 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859893.pdf [firstpage_image] =>[orig_patent_app_number] => 09920531 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/920531
Service guru system and method for automated proactive and reactive computer system analysis Jul 31, 2001 Issued
Array ( [id] => 7642346 [patent_doc_number] => 06430700 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'System and method for fault recovery for a two line bi-directional ring network' [patent_app_type] => B1 [patent_app_number] => 09/910467 [patent_app_country] => US [patent_app_date] => 2001-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6166 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430700.pdf [firstpage_image] =>[orig_patent_app_number] => 09910467 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/910467
System and method for fault recovery for a two line bi-directional ring network Jul 18, 2001 Issued
Array ( [id] => 6775591 [patent_doc_number] => 20030018929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Integrated real-time data tracing with low pin count output' [patent_app_type] => new [patent_app_number] => 09/907387 [patent_app_country] => US [patent_app_date] => 2001-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6658 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20030018929.pdf [firstpage_image] =>[orig_patent_app_number] => 09907387 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/907387
Integrated real-time data tracing with low pin count output Jul 16, 2001 Issued
Array ( [id] => 6656423 [patent_doc_number] => 20030009711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Alarm management system' [patent_app_type] => new [patent_app_number] => 09/894433 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7160 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009711.pdf [firstpage_image] =>[orig_patent_app_number] => 09894433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/894433
Alarm management system Jun 27, 2001 Abandoned
Array ( [id] => 6757592 [patent_doc_number] => 20030005369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'System and method for diagnosing printer problems and notarizing prints by evaluating embedded data' [patent_app_type] => new [patent_app_number] => 09/892397 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2693 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20030005369.pdf [firstpage_image] =>[orig_patent_app_number] => 09892397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892397
System and method for diagnosing printer problems and notarizing prints by evaluating embedded data Jun 26, 2001 Issued
Array ( [id] => 6988803 [patent_doc_number] => 20010037477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Enhanced embedded logic analyzer' [patent_app_type] => new [patent_app_number] => 09/887918 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18902 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20010037477.pdf [firstpage_image] =>[orig_patent_app_number] => 09887918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/887918
Enhanced embedded logic analyzer Jun 20, 2001 Issued
Array ( [id] => 1052632 [patent_doc_number] => 06862690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'Hierarchical recovery method for fibre-channel devices' [patent_app_type] => utility [patent_app_number] => 09/882707 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862690.pdf [firstpage_image] =>[orig_patent_app_number] => 09882707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/882707
Hierarchical recovery method for fibre-channel devices Jun 14, 2001 Issued
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