
Seahvosh J. Nikmanesh
Examiner (ID: 5848, Phone: (571)270-1805 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812 |
| Total Applications | 1329 |
| Issued Applications | 1194 |
| Pending Applications | 6 |
| Abandoned Applications | 133 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14955605
[patent_doc_number] => 10439083
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-08
[patent_title] => Flexible glass support for a solar cell assembly
[patent_app_type] => utility
[patent_app_number] => 15/363780
[patent_app_country] => US
[patent_app_date] => 2016-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2210
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15363780
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/363780 | Flexible glass support for a solar cell assembly | Nov 28, 2016 | Issued |
Array
(
[id] => 11517732
[patent_doc_number] => 20170084806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-23
[patent_title] => 'LENS FOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 15/362865
[patent_app_country] => US
[patent_app_date] => 2016-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7834
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15362865
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/362865 | Lens for light-emitting device and method of manufacturing light-emitting device package | Nov 28, 2016 | Issued |
Array
(
[id] => 11500309
[patent_doc_number] => 20170074494
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-16
[patent_title] => 'OVERMOLDED LEDS AND FABRIC IN VIRTUAL REALITY HEADSETS'
[patent_app_type] => utility
[patent_app_number] => 15/359558
[patent_app_country] => US
[patent_app_date] => 2016-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2763
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15359558
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/359558 | Overmolded LEDs and fabric in virtual reality headsets | Nov 21, 2016 | Issued |
Array
(
[id] => 11446262
[patent_doc_number] => 20170047283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-16
[patent_title] => 'Conductive Through-Polymer Vias for Capacitative Structures Integrated with Packaged Semiconductor Chips'
[patent_app_type] => utility
[patent_app_number] => 15/339550
[patent_app_country] => US
[patent_app_date] => 2016-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4692
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15339550
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/339550 | Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips | Oct 30, 2016 | Issued |
Array
(
[id] => 11578840
[patent_doc_number] => 09634109
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-25
[patent_title] => 'Semiconductor device having dual work function gate structure, method for fabricating the same, transistor circuit having the same, memory cell having the same, and electronic device having the same'
[patent_app_type] => utility
[patent_app_number] => 15/337871
[patent_app_country] => US
[patent_app_date] => 2016-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 49
[patent_no_of_words] => 23586
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15337871
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/337871 | Semiconductor device having dual work function gate structure, method for fabricating the same, transistor circuit having the same, memory cell having the same, and electronic device having the same | Oct 27, 2016 | Issued |
Array
(
[id] => 15286925
[patent_doc_number] => 10516134
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-24
[patent_title] => Organic EL display device and organic EL display device manufacturing method
[patent_app_type] => utility
[patent_app_number] => 16/062641
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 13484
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16062641
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/062641 | Organic EL display device and organic EL display device manufacturing method | Sep 29, 2016 | Issued |
Array
(
[id] => 14573743
[patent_doc_number] => 20190214479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-11
[patent_title] => EPITAXIAL BUFFER TO REDUCE SUB-CHANNEL LEAKAGE IN MOS TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 16/326844
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10093
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326844
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/326844 | Epitaxial buffer to reduce sub-channel leakage in MOS transistors | Sep 29, 2016 | Issued |
Array
(
[id] => 15922453
[patent_doc_number] => 10658475
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-19
[patent_title] => Transistors with vertically opposed source and drain metal interconnect layers
[patent_app_type] => utility
[patent_app_number] => 16/326846
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 8894
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326846
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/326846 | Transistors with vertically opposed source and drain metal interconnect layers | Sep 29, 2016 | Issued |
Array
(
[id] => 16386656
[patent_doc_number] => 10811501
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-20
[patent_title] => InN tunnel junction contacts for P-channel GaN
[patent_app_type] => utility
[patent_app_number] => 16/326857
[patent_app_country] => US
[patent_app_date] => 2016-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6722
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326857
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/326857 | InN tunnel junction contacts for P-channel GaN | Sep 28, 2016 | Issued |
Array
(
[id] => 17002747
[patent_doc_number] => 11081570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-03
[patent_title] => Transistors with lattice matched gate structure
[patent_app_type] => utility
[patent_app_number] => 16/326845
[patent_app_country] => US
[patent_app_date] => 2016-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 9756
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326845
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/326845 | Transistors with lattice matched gate structure | Sep 27, 2016 | Issued |
Array
(
[id] => 15857621
[patent_doc_number] => 10644112
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-05
[patent_title] => Systems, methods and devices for isolation for subfin leakage
[patent_app_type] => utility
[patent_app_number] => 16/326890
[patent_app_country] => US
[patent_app_date] => 2016-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5999
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326890
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/326890 | Systems, methods and devices for isolation for subfin leakage | Sep 27, 2016 | Issued |
Array
(
[id] => 11382704
[patent_doc_number] => 20170008761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-12
[patent_title] => 'ACCELEROMETER AND ITS FABRICATION TECHNIQUE'
[patent_app_type] => utility
[patent_app_number] => 15/274174
[patent_app_country] => US
[patent_app_date] => 2016-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3626
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15274174
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/274174 | Accelerometer and its fabrication technique | Sep 22, 2016 | Issued |
Array
(
[id] => 13597955
[patent_doc_number] => 20180350526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-06
[patent_title] => METHOD FOR PRODUCING ELECTRODE FOR ALUMINUM ELECTROLYTIC CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 15/780447
[patent_app_country] => US
[patent_app_date] => 2016-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7465
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15780447
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/780447 | Method for producing electrode for aluminum electrolytic capacitor | Sep 19, 2016 | Issued |
Array
(
[id] => 11753403
[patent_doc_number] => 09711421
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-07-18
[patent_title] => 'Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of GATE-snake-open-configured, NCEM-enabled fill cells'
[patent_app_type] => utility
[patent_app_number] => 15/258432
[patent_app_country] => US
[patent_app_date] => 2016-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 151
[patent_figures_cnt] => 165
[patent_no_of_words] => 45738
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258432
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/258432 | Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of GATE-snake-open-configured, NCEM-enabled fill cells | Sep 6, 2016 | Issued |
Array
(
[id] => 11453520
[patent_doc_number] => 09577174
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-21
[patent_title] => 'CVD nanocrystalline silicon thermoelectric material'
[patent_app_type] => utility
[patent_app_number] => 15/256764
[patent_app_country] => US
[patent_app_date] => 2016-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 7403
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256764
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/256764 | CVD nanocrystalline silicon thermoelectric material | Sep 5, 2016 | Issued |
Array
(
[id] => 11353529
[patent_doc_number] => 20160372267
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'FLAT CAPACITOR FOR AN IMPLANTABLE MEDICAL DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/251526
[patent_app_country] => US
[patent_app_date] => 2016-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 80
[patent_figures_cnt] => 80
[patent_no_of_words] => 39358
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251526
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/251526 | FLAT CAPACITOR FOR AN IMPLANTABLE MEDICAL DEVICE | Aug 29, 2016 | Abandoned |
Array
(
[id] => 14984991
[patent_doc_number] => 10446416
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-15
[patent_title] => Method and apparatus for processing wafer-shaped articles
[patent_app_type] => utility
[patent_app_number] => 15/232594
[patent_app_country] => US
[patent_app_date] => 2016-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 3121
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232594
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/232594 | Method and apparatus for processing wafer-shaped articles | Aug 8, 2016 | Issued |
Array
(
[id] => 12038467
[patent_doc_number] => 09816691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Method and system for forming LED light emitters'
[patent_app_type] => utility
[patent_app_number] => 15/228924
[patent_app_country] => US
[patent_app_date] => 2016-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3080
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15228924
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/228924 | Method and system for forming LED light emitters | Aug 3, 2016 | Issued |
Array
(
[id] => 11272030
[patent_doc_number] => 20160334577
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'BACK-SIDE ETCHING AND CLEAVING OF SUBSTRATES'
[patent_app_type] => utility
[patent_app_number] => 15/223509
[patent_app_country] => US
[patent_app_date] => 2016-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4500
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223509
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/223509 | Back-side etching and cleaving of substrates | Jul 28, 2016 | Issued |
Array
(
[id] => 11307482
[patent_doc_number] => 09514886
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-06
[patent_title] => 'Cryogenic grinding of tantalum for use in capacitor manufacture'
[patent_app_type] => utility
[patent_app_number] => 15/220345
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5829
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220345
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/220345 | Cryogenic grinding of tantalum for use in capacitor manufacture | Jul 25, 2016 | Issued |