Search

Sean D. Rossiter

Examiner (ID: 2849, Phone: (571)270-3788 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2186, 2133
Total Applications
956
Issued Applications
863
Pending Applications
34
Abandoned Applications
79

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17846549 [patent_doc_number] => 11435920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Storage system and method for using read and write buffers in a memory [patent_app_type] => utility [patent_app_number] => 17/183703 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183703
Storage system and method for using read and write buffers in a memory Feb 23, 2021 Issued
Array ( [id] => 18262009 [patent_doc_number] => 11609710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Host, data storage device, data processing system and data processing method [patent_app_type] => utility [patent_app_number] => 17/177722 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177722
Host, data storage device, data processing system and data processing method Feb 16, 2021 Issued
Array ( [id] => 18104315 [patent_doc_number] => 11544201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Memory tracing in an emulated computing system [patent_app_type] => utility [patent_app_number] => 17/169042 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7371 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169042 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169042
Memory tracing in an emulated computing system Feb 4, 2021 Issued
Array ( [id] => 17940248 [patent_doc_number] => 11474701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-18 [patent_title] => Determining capacity consumption in a deduplicating storage system [patent_app_type] => utility [patent_app_number] => 17/157573 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 34977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157573 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/157573
Determining capacity consumption in a deduplicating storage system Jan 24, 2021 Issued
Array ( [id] => 16826430 [patent_doc_number] => 20210141723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => MEMORY USAGE IN MANAGED RUNTIME APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/156593 [patent_app_country] => US [patent_app_date] => 2021-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9005 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156593
MEMORY USAGE IN MANAGED RUNTIME APPLICATIONS Jan 23, 2021 Pending
Array ( [id] => 16872188 [patent_doc_number] => 20210165655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/156065 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156065 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156065
Memory mapping using commands to transfer data and/or perform logic operations Jan 21, 2021 Issued
Array ( [id] => 17338165 [patent_doc_number] => 20220004496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF OPERATING MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/156308 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156308 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156308
Memory system, memory controller, and method of operating memory system for caching journal information for zone in the journal cache Jan 21, 2021 Issued
Array ( [id] => 16794707 [patent_doc_number] => 20210124524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => ENHANCED MEMORY DEVICE ARCHITECTURE FOR MACHINE LEARNING [patent_app_type] => utility [patent_app_number] => 17/143001 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/143001
Enhanced memory device architecture for machine learning Jan 5, 2021 Issued
Array ( [id] => 19084870 [patent_doc_number] => 20240111671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/267975 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18267975 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/267975
Memory system which orders data fetching from a latch circuit during execution of a read operation Dec 27, 2020 Issued
Array ( [id] => 17690523 [patent_doc_number] => 20220197816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => COMPRESSED CACHE MEMORY WITH PARALLEL DECOMPRESS ON FAULT [patent_app_type] => utility [patent_app_number] => 17/130638 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130638
COMPRESSED CACHE MEMORY WITH PARALLEL DECOMPRESS ON FAULT Dec 21, 2020 Abandoned
Array ( [id] => 17515437 [patent_doc_number] => 11294585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Sequential data optimized sub-regions in storage devices [patent_app_type] => utility [patent_app_number] => 17/129087 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129087 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129087
Sequential data optimized sub-regions in storage devices Dec 20, 2020 Issued
Array ( [id] => 17572969 [patent_doc_number] => 11321239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Dynamically joining and splitting dynamic address translation (DAT) tables based on operational context [patent_app_type] => utility [patent_app_number] => 17/128664 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4859 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128664
Dynamically joining and splitting dynamic address translation (DAT) tables based on operational context Dec 20, 2020 Issued
Array ( [id] => 17542861 [patent_doc_number] => 11307983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Maintaining data consistency in a memory subsystem that uses hybrid wear leveling operations [patent_app_type] => utility [patent_app_number] => 17/247373 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 12363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/247373
Maintaining data consistency in a memory subsystem that uses hybrid wear leveling operations Dec 8, 2020 Issued
Array ( [id] => 17469204 [patent_doc_number] => 11275681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-15 [patent_title] => Segmented write requests [patent_app_type] => utility [patent_app_number] => 17/114365 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 30189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114365
Segmented write requests Dec 6, 2020 Issued
Array ( [id] => 17613916 [patent_doc_number] => 20220156196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SPLIT CACHE FOR ADDRESS MAPPING DATA [patent_app_type] => utility [patent_app_number] => 16/953075 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16953075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/953075
Split cache for address mapping data Nov 18, 2020 Issued
Array ( [id] => 17230761 [patent_doc_number] => 20210357318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/091101 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091101
Memory controller and method of operating the same Nov 5, 2020 Issued
Array ( [id] => 17675072 [patent_doc_number] => 20220188239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY CLEANING METHOD, INTELLIGENT TERMINAL AND READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/253981 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17253981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/253981
Memory cleaning method, intelligent terminal and readable storage medium Oct 29, 2020 Issued
Array ( [id] => 18119334 [patent_doc_number] => 11550729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Memory ballooning related memory allocation techniques for virtual machines [patent_app_type] => utility [patent_app_number] => 17/082654 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082654
Memory ballooning related memory allocation techniques for virtual machines Oct 27, 2020 Issued
Array ( [id] => 18046766 [patent_doc_number] => 11520720 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-06 [patent_title] => Weighted resource allocation for workload scheduling [patent_app_type] => utility [patent_app_number] => 17/080072 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 35040 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/080072
Weighted resource allocation for workload scheduling Oct 25, 2020 Issued
Array ( [id] => 16623402 [patent_doc_number] => 20210042055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => PER CURSOR LOGICAL UNIT NUMBER SEQUENCING [patent_app_type] => utility [patent_app_number] => 17/078980 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078980
Per cursor logical unit number sequencing Oct 22, 2020 Issued
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