Sean D. Rossiter

Array ( [id] => 15312851 [patent_doc_number] => 10521129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Memory system capable of accessing memory cell arrays in parallel [patent_app_type] => utility [patent_app_number] => 16/199803 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 7413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199803 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15257551 [patent_doc_number] => 20190377509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => CHUNK-BASED DATA DEDUPLICATION [patent_app_type] => utility [patent_app_number] => 16/198582 [patent_app_country] => US [patent_app_date] => 2018-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15936063 [patent_doc_number] => 20200159665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SPECULATIVE DATA RETURN CONCURRENT TO AN EXCLUSIVE INVALIDATE REQUEST [patent_app_type] => utility [patent_app_number] => 16/197669 [patent_app_country] => US [patent_app_date] => 2018-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16494433 [patent_doc_number] => 10860475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-08 [patent_title] => Hybrid flash translation layer [patent_app_type] => utility [patent_app_number] => 16/186142 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 30173 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14189131 [patent_doc_number] => 20190114271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => COORDINATING MEMORY OPERATIONS USING MEMORY-DEVICE GENERATED REFERENCE SIGNALS [patent_app_type] => utility [patent_app_number] => 16/164242 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16065325 [patent_doc_number] => 10691612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => System and methods exchanging data between processors through concurrent shared memory [patent_app_type] => utility [patent_app_number] => 16/159442 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3224 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13905795 [patent_doc_number] => 20190042102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => MEMORY SCHEDULING METHOD FOR CHANGING COMMAND ORDER AND METHOD OF OPERATING MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/157300 [patent_app_country] => US [patent_app_date] => 2018-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16157300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13906519 [patent_doc_number] => 20190042464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => ADDRESS RANGE MAPPING FOR STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 16/153561 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13875517 [patent_doc_number] => 20190034099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => Maintenance Operations in a DRAM [patent_app_type] => utility [patent_app_number] => 16/145931 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706383 [patent_doc_number] => 10956316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Method and device for processing reclaimable memory pages, and storage medium [patent_app_type] => utility [patent_app_number] => 16/139624 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706383 [patent_doc_number] => 10956316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Method and device for processing reclaimable memory pages, and storage medium [patent_app_type] => utility [patent_app_number] => 16/139624 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706383 [patent_doc_number] => 10956316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Method and device for processing reclaimable memory pages, and storage medium [patent_app_type] => utility [patent_app_number] => 16/139624 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706383 [patent_doc_number] => 10956316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Method and device for processing reclaimable memory pages, and storage medium [patent_app_type] => utility [patent_app_number] => 16/139624 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13845251 [patent_doc_number] => 20190026110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => PERFORMING AN OPERATION ABSENT HOST INTERVENTION [patent_app_type] => utility [patent_app_number] => 16/126588 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16032541 [patent_doc_number] => 10678691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Coherence flows for dual-processing pipelines [patent_app_type] => utility [patent_app_number] => 16/124713 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13830223 [patent_doc_number] => 20190018596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => MEMORY SYSTEM AND INFORMATION PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 16/123465 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16123465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16565855 [patent_doc_number] => 10891224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Maintaining data consistency in a memory sub system that uses hybrid wear leveling operations [patent_app_type] => utility [patent_app_number] => 16/123979 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 12340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16123979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14872211 [patent_doc_number] => 20190286347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => MANAGEMENT APPARATUS, INFORMATION PROCESSING APPARATUS, MANAGEMENT METHOD, AND COMPUTER PROGRAM PRODUCT [patent_app_type] => utility [patent_app_number] => 16/121337 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14022307 [patent_doc_number] => 20190073147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => CONTROL DEVICE, METHOD AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/117213 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117213 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16263362 [patent_doc_number] => 10754796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Efficient user space driver isolation by CPU page table switching [patent_app_type] => utility [patent_app_number] => 16/116028 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116028 [rel_patent_id] =>[rel_patent_doc_number] =>)