Search

Sean D. Rossiter

Examiner (ID: 5301)

Most Active Art Unit
2133
Art Unit(s)
2133, 2186
Total Applications
963
Issued Applications
865
Pending Applications
38
Abandoned Applications
79

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19979137 [patent_doc_number] => 12346612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Memory sub-system command fencing [patent_app_type] => utility [patent_app_number] => 18/615760 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615760
Memory sub-system command fencing Mar 24, 2024 Issued
Array ( [id] => 19795161 [patent_doc_number] => 12236111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Maintenance operations in a DRAM [patent_app_type] => utility [patent_app_number] => 18/610888 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 13689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610888 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610888
Maintenance operations in a DRAM Mar 19, 2024 Issued
Array ( [id] => 19795164 [patent_doc_number] => 12236114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Resource isolation in computational storage devices [patent_app_type] => utility [patent_app_number] => 18/608871 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608871
Resource isolation in computational storage devices Mar 17, 2024 Issued
Array ( [id] => 19795164 [patent_doc_number] => 12236114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Resource isolation in computational storage devices [patent_app_type] => utility [patent_app_number] => 18/608871 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608871
Resource isolation in computational storage devices Mar 17, 2024 Issued
Array ( [id] => 19795164 [patent_doc_number] => 12236114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Resource isolation in computational storage devices [patent_app_type] => utility [patent_app_number] => 18/608871 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608871
Resource isolation in computational storage devices Mar 17, 2024 Issued
Array ( [id] => 19795164 [patent_doc_number] => 12236114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Resource isolation in computational storage devices [patent_app_type] => utility [patent_app_number] => 18/608871 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608871
Resource isolation in computational storage devices Mar 17, 2024 Issued
Array ( [id] => 20234416 [patent_doc_number] => 20250291735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => MULTI-CORE PROCESSOR-BASED SYSTEM IMPLEMENTING DIRECTED PAGE TABLE ENTRY INVALIDATION [patent_app_type] => utility [patent_app_number] => 18/607355 [patent_app_country] => US [patent_app_date] => 2024-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607355 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607355
MULTI-CORE PROCESSOR-BASED SYSTEM IMPLEMENTING DIRECTED PAGE TABLE ENTRY INVALIDATION Mar 14, 2024 Pending
Array ( [id] => 19334424 [patent_doc_number] => 20240248854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => MEMORY SYSTEM FOR BINDING DATA TO A MEMORY NAMESPACE [patent_app_type] => utility [patent_app_number] => 18/604086 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604086
Memory system for binding data to a memory namespace Mar 12, 2024 Issued
Array ( [id] => 20195534 [patent_doc_number] => 20250272244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => CLIENT ORIGINATED CACHE KEY MODIFIERS IN EDGE CACHING SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/585251 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585251 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585251
CLIENT ORIGINATED CACHE KEY MODIFIERS IN EDGE CACHING SYSTEMS Feb 22, 2024 Pending
Array ( [id] => 20344749 [patent_doc_number] => 12468479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Simultaneous distributed and non-distributed address maps and routing protocols in a computing system [patent_app_type] => utility [patent_app_number] => 18/583718 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583718 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583718
Simultaneous distributed and non-distributed address maps and routing protocols in a computing system Feb 20, 2024 Issued
Array ( [id] => 19905651 [patent_doc_number] => 12282658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-22 [patent_title] => System and method for large memory transaction (LMT) stores [patent_app_type] => utility [patent_app_number] => 18/583457 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3426 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583457
System and method for large memory transaction (LMT) stores Feb 20, 2024 Issued
Array ( [id] => 19891830 [patent_doc_number] => 20250117142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SUSPEND PARAMETER DETERMINATION DEVICE AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/581404 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581404
Suspend parameter determination device and method thereof Feb 19, 2024 Issued
Array ( [id] => 20595174 [patent_doc_number] => 12578890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Block replacement using combined blocks [patent_app_type] => utility [patent_app_number] => 18/438155 [patent_app_country] => US [patent_app_date] => 2024-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18438155 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/438155
Block replacement using combined blocks Feb 8, 2024 Issued
Array ( [id] => 20331382 [patent_doc_number] => 12461657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Using a zone wordline table to initiate a find last good page process [patent_app_type] => utility [patent_app_number] => 18/436408 [patent_app_country] => US [patent_app_date] => 2024-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18436408 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/436408
Using a zone wordline table to initiate a find last good page process Feb 7, 2024 Issued
Array ( [id] => 20123341 [patent_doc_number] => 20250238372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => EFFICIENT DEDUPLICATION IN A METADATA DELTA LOG ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/417463 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/417463
Efficient deduplication in a metadata delta log architecture Jan 18, 2024 Issued
Array ( [id] => 20174772 [patent_doc_number] => 12393519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Systems and methods for dynamically allocating memory pages to enable memory footprint reduction [patent_app_type] => utility [patent_app_number] => 18/408311 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6149 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408311
Systems and methods for dynamically allocating memory pages to enable memory footprint reduction Jan 8, 2024 Issued
Array ( [id] => 19334189 [patent_doc_number] => 20240248619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM [patent_app_type] => utility [patent_app_number] => 18/406687 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406687
Dynamic read retry voltage sequences in a memory subsystem Jan 7, 2024 Issued
Array ( [id] => 20087362 [patent_doc_number] => 20250217298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => SYSTEMS AND METHODS FOR REDUCING CACHE FILLS [patent_app_type] => utility [patent_app_number] => 18/399332 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399332 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399332
Systems and methods for reducing cache fills Dec 27, 2023 Issued
Array ( [id] => 20317135 [patent_doc_number] => 12455685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Managing storage resource requirements for storage objects [patent_app_type] => utility [patent_app_number] => 18/399368 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 38527 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399368 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399368
Managing storage resource requirements for storage objects Dec 27, 2023 Issued
Array ( [id] => 20174597 [patent_doc_number] => 12393343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Memory operation method for unaligned write, memory and electronic device [patent_app_type] => utility [patent_app_number] => 18/397186 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397186
Memory operation method for unaligned write, memory and electronic device Dec 26, 2023 Issued
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