Search

Sean D. Rossiter

Examiner (ID: 15780, Phone: (571)270-3788 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2133, 2186
Total Applications
953
Issued Applications
862
Pending Applications
32
Abandoned Applications
79

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10543556 [patent_doc_number] => 09268688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Data management method, memory controller and memory storage apparatus' [patent_app_type] => utility [patent_app_number] => 14/583107 [patent_app_country] => US [patent_app_date] => 2014-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 9810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583107 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583107
Data management method, memory controller and memory storage apparatus Dec 24, 2014 Issued
Array ( [id] => 10342465 [patent_doc_number] => 20150227470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS' [patent_app_type] => utility [patent_app_number] => 14/580345 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5057 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14580345 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/580345
Maintaining processor resources during architectural events Dec 22, 2014 Issued
Array ( [id] => 10982721 [patent_doc_number] => 20160179665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'CONTROL OF ENTRY INTO PROTECTED MEMORY VIEWS' [patent_app_type] => utility [patent_app_number] => 14/581730 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7143 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581730 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581730
Control of entry into protected memory views Dec 22, 2014 Issued
Array ( [id] => 10982724 [patent_doc_number] => 20160179667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'INSTRUCTION AND LOGIC FOR FLUSH-ON-FAIL OPERATION' [patent_app_type] => utility [patent_app_number] => 14/580632 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 22399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14580632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/580632
Instruction and logic for flush-on-fail operation Dec 22, 2014 Issued
Array ( [id] => 10228207 [patent_doc_number] => 20150113200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS' [patent_app_type] => utility [patent_app_number] => 14/579526 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5064 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579526 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/579526
Maintaining processor resources during architectural events Dec 21, 2014 Issued
Array ( [id] => 10117676 [patent_doc_number] => 09152561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Maintaining processor resources during architectural events' [patent_app_type] => utility [patent_app_number] => 14/579040 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5069 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579040 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/579040
Maintaining processor resources during architectural events Dec 21, 2014 Issued
Array ( [id] => 10085129 [patent_doc_number] => 09122477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Execution of a perform frame management function instruction' [patent_app_type] => utility [patent_app_number] => 14/576729 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 18625 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14576729 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/576729
Execution of a perform frame management function instruction Dec 18, 2014 Issued
Array ( [id] => 10221573 [patent_doc_number] => 20150106565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'STORAGE CONTROLLING APPARATUS, INFORMATION PROCESSING APPARATUS, AND COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN STORAGE CONTROLLING PROGRAM' [patent_app_type] => utility [patent_app_number] => 14/573484 [patent_app_country] => US [patent_app_date] => 2014-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12922 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14573484 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/573484
Storage controlling apparatus, information processing apparatus, and computer-readable recording medium having stored therein storage controlling program Dec 16, 2014 Issued
Array ( [id] => 11327066 [patent_doc_number] => 20160357677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFETCH EFFECTIVENESS BY MEMORY ACCESS TYPE' [patent_app_type] => utility [patent_app_number] => 14/891331 [patent_app_country] => US [patent_app_date] => 2014-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12882 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14891331 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/891331
Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type Dec 13, 2014 Issued
Array ( [id] => 12053655 [patent_doc_number] => 20170329998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'A MULTI-TIER SECURITY FRAMEWORK' [patent_app_type] => utility [patent_app_number] => 15/535361 [patent_app_country] => US [patent_app_date] => 2014-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6780 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15535361 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/535361
Multi-tier security framework Dec 9, 2014 Issued
Array ( [id] => 10786252 [patent_doc_number] => 20160132408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'MIRRORING IN THREE-DIMENSIONAL STACKED MEMORY' [patent_app_type] => utility [patent_app_number] => 14/556735 [patent_app_country] => US [patent_app_date] => 2014-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8450 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14556735 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/556735
Mirroring in three-dimensional stacked memory Nov 30, 2014 Issued
Array ( [id] => 10650992 [patent_doc_number] => 09367244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Composing a virtual disk using application delta disk images' [patent_app_type] => utility [patent_app_number] => 14/557137 [patent_app_country] => US [patent_app_date] => 2014-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9133 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14557137 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/557137
Composing a virtual disk using application delta disk images Nov 30, 2014 Issued
Array ( [id] => 9933876 [patent_doc_number] => 20150082068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'DUAL-MODE, DUAL-DISPLAY SHARED RESOURCE COMPUTING' [patent_app_type] => utility [patent_app_number] => 14/551995 [patent_app_country] => US [patent_app_date] => 2014-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7804 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14551995 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/551995
Information transmission based on modal change Nov 23, 2014 Issued
Array ( [id] => 12146718 [patent_doc_number] => 09880971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Memory appliance for accessing memory' [patent_app_type] => utility [patent_app_number] => 14/539641 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 26765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539641 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539641
Memory appliance for accessing memory Nov 11, 2014 Issued
Array ( [id] => 11488587 [patent_doc_number] => 09594657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Method of analysing memory usage and user terminal performing the same' [patent_app_type] => utility [patent_app_number] => 14/538895 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4409 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538895 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538895
Method of analysing memory usage and user terminal performing the same Nov 11, 2014 Issued
Array ( [id] => 11644155 [patent_doc_number] => 09665533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Blob pools, selectors, and command set implemented within a memory appliance for accessing memory' [patent_app_type] => utility [patent_app_number] => 14/539662 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 17233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539662 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539662
Blob pools, selectors, and command set implemented within a memory appliance for accessing memory Nov 11, 2014 Issued
Array ( [id] => 9919144 [patent_doc_number] => 20150074349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'MANAGEMENT SYSTEM CALCULATING STORAGE CAPACITY TO BE INSTALLED/REMOVED' [patent_app_type] => utility [patent_app_number] => 14/539292 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 17780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539292 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539292
Management system calculating storage capacity to be installed/removed Nov 11, 2014 Issued
Array ( [id] => 12291549 [patent_doc_number] => 09934194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Memory packet, data structure and hierarchy within a memory appliance for accessing memory [patent_app_type] => utility [patent_app_number] => 14/539628 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 16440 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14539628 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/539628
Memory packet, data structure and hierarchy within a memory appliance for accessing memory Nov 11, 2014 Issued
Array ( [id] => 10786253 [patent_doc_number] => 20160132409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'MIRRORING IN THREE-DIMENSIONAL STACKED MEMORY' [patent_app_type] => utility [patent_app_number] => 14/538966 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8450 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538966 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538966
Mirroring in three-dimensional stacked memory Nov 11, 2014 Issued
Array ( [id] => 11307395 [patent_doc_number] => 09514799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Memory scheduling method and memory controller' [patent_app_type] => utility [patent_app_number] => 14/538095 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9766 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538095 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538095
Memory scheduling method and memory controller Nov 10, 2014 Issued
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