
Selim U. Ahmed
Examiner (ID: 11248, Phone: (571)270-5025 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2896, 2826, CQIC, 4122 |
| Total Applications | 974 |
| Issued Applications | 852 |
| Pending Applications | 3 |
| Abandoned Applications | 123 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15760727
[patent_doc_number] => 10622496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-04-14
[patent_title] => Integrated photodetector waveguide structure with alignment tolerance
[patent_app_type] => utility
[patent_app_number] => 16/445513
[patent_app_country] => US
[patent_app_date] => 2019-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 4630
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445513
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/445513 | Integrated photodetector waveguide structure with alignment tolerance | Jun 18, 2019 | Issued |
Array
(
[id] => 15488435
[patent_doc_number] => 10559579
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-11
[patent_title] => Assemblies having vertically-stacked conductive structures
[patent_app_type] => utility
[patent_app_number] => 16/443491
[patent_app_country] => US
[patent_app_date] => 2019-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 8375
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16443491
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/443491 | Assemblies having vertically-stacked conductive structures | Jun 16, 2019 | Issued |
Array
(
[id] => 15184931
[patent_doc_number] => 20190363057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => Method for Processing a Semiconductor Wafer, Semiconductor Composite Structure and Support Structure for Semiconductor Wafer
[patent_app_type] => utility
[patent_app_number] => 16/421707
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19713
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -34
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421707
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421707 | Method for processing a semiconductor wafer, semiconductor composite structure and support structure for semiconductor wafer | May 23, 2019 | Issued |
Array
(
[id] => 17195721
[patent_doc_number] => 11164486
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Micro LED display panel including light-emitting units and method for making same
[patent_app_type] => utility
[patent_app_number] => 16/421821
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3038
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421821
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421821 | Micro LED display panel including light-emitting units and method for making same | May 23, 2019 | Issued |
Array
(
[id] => 16471944
[patent_doc_number] => 20200373482
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => RESISTIVE MEMORY CELL STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/421598
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3594
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421598
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421598 | Resistive memory cell structure | May 23, 2019 | Issued |
Array
(
[id] => 16471732
[patent_doc_number] => 20200373270
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => HIGH RELIABILITY SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/421824
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11215
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421824
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421824 | High reliability semiconductor devices and methods of fabricating the same | May 23, 2019 | Issued |
Array
(
[id] => 17818574
[patent_doc_number] => 11424197
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-23
[patent_title] => Package, package structure with redistributing circuits and antenna elements and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/421497
[patent_app_country] => US
[patent_app_date] => 2019-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
[patent_figures_cnt] => 39
[patent_no_of_words] => 23469
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421497
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/421497 | Package, package structure with redistributing circuits and antenna elements and method of manufacturing the same | May 23, 2019 | Issued |
Array
(
[id] => 15045109
[patent_doc_number] => 20190333559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-31
[patent_title] => Multistate magnetic memory element using metamagnetic materials
[patent_app_type] => utility
[patent_app_number] => 16/383590
[patent_app_country] => US
[patent_app_date] => 2019-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2450
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383590
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/383590 | Multistate magnetic memory element using metamagnetic materials | Apr 12, 2019 | Issued |
Array
(
[id] => 15625631
[patent_doc_number] => 20200083220
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/382439
[patent_app_country] => US
[patent_app_date] => 2019-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10478
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382439
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/382439 | Semiconductor device including fin field effect transistor | Apr 11, 2019 | Issued |
Array
(
[id] => 16048231
[patent_doc_number] => 10686000
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-06-16
[patent_title] => Solid-state imaging device
[patent_app_type] => utility
[patent_app_number] => 16/382808
[patent_app_country] => US
[patent_app_date] => 2019-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 18
[patent_no_of_words] => 7933
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382808
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/382808 | Solid-state imaging device | Apr 11, 2019 | Issued |
Array
(
[id] => 16379379
[patent_doc_number] => 20200328222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-15
[patent_title] => Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
[patent_app_type] => utility
[patent_app_number] => 16/382932
[patent_app_country] => US
[patent_app_date] => 2019-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7593
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382932
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/382932 | Methods used in forming a memory array comprising strings of memory cells | Apr 11, 2019 | Issued |
Array
(
[id] => 15315801
[patent_doc_number] => 10522618
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-31
[patent_title] => Isolation structure for active devices
[patent_app_type] => utility
[patent_app_number] => 16/382571
[patent_app_country] => US
[patent_app_date] => 2019-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5738
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382571
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/382571 | Isolation structure for active devices | Apr 11, 2019 | Issued |
Array
(
[id] => 16379463
[patent_doc_number] => 20200328306
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-15
[patent_title] => EPITAXIAL STRUCTURES OF SEMICONDUCTOR DEVICES THAT ARE INDEPENDENT OF LOCAL PATTERN DENSITY
[patent_app_type] => utility
[patent_app_number] => 16/382184
[patent_app_country] => US
[patent_app_date] => 2019-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382184
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/382184 | Epitaxial structures of semiconductor devices that are independent of local pattern density | Apr 10, 2019 | Issued |
Array
(
[id] => 14573727
[patent_doc_number] => 20190214471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-11
[patent_title] => SEMICONDUCTOR DEVICE WITH EXTENDED ELECTRICALLY-SAFE OPERATING AREA
[patent_app_type] => utility
[patent_app_number] => 16/354550
[patent_app_country] => US
[patent_app_date] => 2019-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3889
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354550
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/354550 | Semiconductor device with extended electrically-safe operating area | Mar 14, 2019 | Issued |
Array
(
[id] => 15234557
[patent_doc_number] => 10505009
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-10
[patent_title] => Semiconductor device with fin-type patterns
[patent_app_type] => utility
[patent_app_number] => 16/294158
[patent_app_country] => US
[patent_app_date] => 2019-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 36
[patent_no_of_words] => 14587
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294158
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/294158 | Semiconductor device with fin-type patterns | Mar 5, 2019 | Issued |
Array
(
[id] => 14769143
[patent_doc_number] => 10395973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Isolation structure and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/277774
[patent_app_country] => US
[patent_app_date] => 2019-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 33
[patent_no_of_words] => 11784
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277774
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/277774 | Isolation structure and method for manufacturing the same | Feb 14, 2019 | Issued |
Array
(
[id] => 14413785
[patent_doc_number] => 20190172736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-06
[patent_title] => APPARATUS AND METHOD FOR SECURING COMPONENTS OF AN INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/267644
[patent_app_country] => US
[patent_app_date] => 2019-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10186
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267644
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/267644 | Apparatus and method for securing components of an integrated circuit | Feb 4, 2019 | Issued |
Array
(
[id] => 17018358
[patent_doc_number] => 11088003
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-10
[patent_title] => Apparatus for fabricating a semiconductor device and method for fabricating semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/258824
[patent_app_country] => US
[patent_app_date] => 2019-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5464
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258824
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/258824 | Apparatus for fabricating a semiconductor device and method for fabricating semiconductor device | Jan 27, 2019 | Issued |
Array
(
[id] => 16120051
[patent_doc_number] => 20200212048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => METHOD FOR FORMING SEMICONDUCTOR PATTERN
[patent_app_type] => utility
[patent_app_number] => 16/258657
[patent_app_country] => US
[patent_app_date] => 2019-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3943
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258657
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/258657 | Method for forming semiconductor pattern | Jan 26, 2019 | Issued |
Array
(
[id] => 17046163
[patent_doc_number] => 11099338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-24
[patent_title] => Method of forming an hermetic seal on electronic and optoelectronic packages
[patent_app_type] => utility
[patent_app_number] => 16/258308
[patent_app_country] => US
[patent_app_date] => 2019-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 78
[patent_no_of_words] => 21963
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258308
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/258308 | Method of forming an hermetic seal on electronic and optoelectronic packages | Jan 24, 2019 | Issued |