Selim U Ahmed

Array ( [id] => 3853451 [patent_doc_number] => 05761726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processor' [patent_app_type] => 1 [patent_app_number] => 8/479981 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 70 [patent_no_of_words] => 99551 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761726.pdf [firstpage_image] =>[orig_patent_app_number] => 479981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3894252 [patent_doc_number] => 05764953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Computer implemented system for integrating active and simulated decisionmaking processes' [patent_app_type] => 1 [patent_app_number] => 8/469760 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9934 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764953.pdf [firstpage_image] =>[orig_patent_app_number] => 469760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4237433 [patent_doc_number] => 06112290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Communication system signal processing apparatus with ROM stored signal procedures executed RAM' [patent_app_type] => 1 [patent_app_number] => 8/465315 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1676 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/112/06112290.pdf [firstpage_image] =>[orig_patent_app_number] => 465315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3616793 [patent_doc_number] => 05579518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Message compiler for object-oriented language that statically produces object code by provisionally identifying a set of candidate types' [patent_app_type] => 1 [patent_app_number] => 8/455255 [patent_app_country] => US [patent_app_date] => 1995-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5515 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579518.pdf [firstpage_image] =>[orig_patent_app_number] => 455255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3603906 [patent_doc_number] => 05586306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Integrated circuit servo system control for computer mass storage device with distributed control functionality to reduce transport delay' [patent_app_type] => 1 [patent_app_number] => 8/448098 [patent_app_country] => US [patent_app_date] => 1995-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 13162 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586306.pdf [firstpage_image] =>[orig_patent_app_number] => 448098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3707734 [patent_doc_number] => 05680575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Interconnect failure detection and cache reset apparatus' [patent_app_type] => 1 [patent_app_number] => 8/443293 [patent_app_country] => US [patent_app_date] => 1995-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 13510 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680575.pdf [firstpage_image] =>[orig_patent_app_number] => 443293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3661025 [patent_doc_number] => 05638535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Method and apparatus for providing flow control with lying for input/output operations in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/441405 [patent_app_country] => US [patent_app_date] => 1995-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 15191 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638535.pdf [firstpage_image] =>[orig_patent_app_number] => 441405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3759657 [patent_doc_number] => 05754889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Auto write counter for controlling a multi-sector write operation in a disk drive controller' [patent_app_type] => 1 [patent_app_number] => 8/426430 [patent_app_country] => US [patent_app_date] => 1995-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14678 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754889.pdf [firstpage_image] =>[orig_patent_app_number] => 426430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3547909 [patent_doc_number] => 05557780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Electronic data interchange system for managing non-standard data' [patent_app_type] => 1 [patent_app_number] => 8/426469 [patent_app_country] => US [patent_app_date] => 1995-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6311 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557780.pdf [firstpage_image] =>[orig_patent_app_number] => 426469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1452161 [patent_doc_number] => 06370589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Process for performing at least one test on at least one of the objects of an object-oriented program capable of running in parallel on a computer' [patent_app_type] => B1 [patent_app_number] => 08/416827 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2891 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/370/06370589.pdf [firstpage_image] =>[orig_patent_app_number] => 08416827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3775823 [patent_doc_number] => 05742782 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Processing apparatus for executing a plurality of VLIW threads in parallel' [patent_app_type] => 1 [patent_app_number] => 8/422220 [patent_app_country] => US [patent_app_date] => 1995-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8950 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 343 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742782.pdf [firstpage_image] =>[orig_patent_app_number] => 422220 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3796653 [patent_doc_number] => 05819059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Predecode unit adapted for variable byte-length instruction set processors and method of operating the same' [patent_app_type] => 1 [patent_app_number] => 8/421663 [patent_app_country] => US [patent_app_date] => 1995-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 72 [patent_no_of_words] => 74859 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/819/05819059.pdf [firstpage_image] =>[orig_patent_app_number] => 421663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3695767 [patent_doc_number] => 05634118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Splitting a floating-point stack-exchange instruction for merging into surrounding instructions by operand translation' [patent_app_type] => 1 [patent_app_number] => 8/419122 [patent_app_country] => US [patent_app_date] => 1995-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 11346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634118.pdf [firstpage_image] =>[orig_patent_app_number] => 419122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3719380 [patent_doc_number] => 05655154 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Method and system for sharing utilities between operating systems' [patent_app_type] => 1 [patent_app_number] => 8/418865 [patent_app_country] => US [patent_app_date] => 1995-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4525 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655154.pdf [firstpage_image] =>[orig_patent_app_number] => 418865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317952 [patent_doc_number] => 06185674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method and apparatus for reconstructing the address of the next instruction to be completed in a pipelined processor' [patent_app_type] => 1 [patent_app_number] => 8/417421 [patent_app_country] => US [patent_app_date] => 1995-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 9 [patent_no_of_words] => 10020 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185674.pdf [firstpage_image] =>[orig_patent_app_number] => 417421 [rel_patent_id] =>[rel_patent_doc_number] =>)