Search

Selim U Ahmed

Examiner (ID: 14822, Phone: (571)270-5025 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, CQIC, 4122, 2826, 2896
Total Applications
974
Issued Applications
848
Pending Applications
3
Abandoned Applications
123

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3547465 [patent_doc_number] => 05557750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Prefetch/prestore mechanism for peripheral controllers with shared internal bus' [patent_app_type] => 1 [patent_app_number] => 7/963583 [patent_app_country] => US [patent_app_date] => 1992-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5957 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557750.pdf [firstpage_image] =>[orig_patent_app_number] => 963583 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/963583
Prefetch/prestore mechanism for peripheral controllers with shared internal bus Oct 19, 1992 Issued
07/950331 METHOD AND SYSTEM FOR OPTILONALLY REGISTERING A LOCAL PROCESS TO ALLOW PARTICIPATION IN A SINGLE SYSTEM SEMANTIC Sep 23, 1992 Abandoned
07/907833 PROTOCOL PARALLEL PROCESSING APPARATUS HAVING A PLURALITY OF CPUS ALLOCATED TO PROCESS HIERARCHICAL PROTOCOLS Jul 1, 1992 Abandoned
Array ( [id] => 3701156 [patent_doc_number] => 05644761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Basic operations synchronization and local mode controller in a VLSI central processor' [patent_app_type] => 1 [patent_app_number] => 7/893871 [patent_app_country] => US [patent_app_date] => 1992-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5799 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 677 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644761.pdf [firstpage_image] =>[orig_patent_app_number] => 893871 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/893871
Basic operations synchronization and local mode controller in a VLSI central processor Jun 4, 1992 Issued
Array ( [id] => 3700944 [patent_doc_number] => 05644746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Data processing apparatus with improved mechanism for executing register-to-register transfer instructions' [patent_app_type] => 1 [patent_app_number] => 7/876965 [patent_app_country] => US [patent_app_date] => 1992-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3133 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644746.pdf [firstpage_image] =>[orig_patent_app_number] => 876965 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/876965
Data processing apparatus with improved mechanism for executing register-to-register transfer instructions Apr 29, 1992 Issued
07/876755 ELECTRONIC DATA INTERCHANGE Apr 29, 1992 Abandoned
07/847457 METHOD FOR LOADING PROGRAMS Mar 5, 1992 Abandoned
07/836653 METHOD AND ARRANGEMENT FOR REARRANGING COMPUTER PROGRAM INSTRUCTIONS TO SPEED UP EXECUTION TIME IN A RISC MACHINE Feb 17, 1992 Abandoned
Array ( [id] => 3701847 [patent_doc_number] => 05604886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Design supporting apparatus and method for performing design work at each of a plurality of design stages' [patent_app_type] => 1 [patent_app_number] => 7/834352 [patent_app_country] => US [patent_app_date] => 1992-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5544 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604886.pdf [firstpage_image] =>[orig_patent_app_number] => 834352 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/834352
Design supporting apparatus and method for performing design work at each of a plurality of design stages Feb 11, 1992 Issued
07/808320 REDUCING THE PROCESSING TIME REQUIRED TO SOLVE NUMERICAL PROBLEMS Dec 12, 1991 Abandoned
07/801666 PROCESSOR Dec 1, 1991 Abandoned
Array ( [id] => 3900576 [patent_doc_number] => 05715391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Modular and infinitely extendable three dimensional torus packaging scheme for parallel processing' [patent_app_type] => 1 [patent_app_number] => 7/793064 [patent_app_country] => US [patent_app_date] => 1991-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 4843 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715391.pdf [firstpage_image] =>[orig_patent_app_number] => 793064 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/793064
Modular and infinitely extendable three dimensional torus packaging scheme for parallel processing Nov 14, 1991 Issued
Array ( [id] => 3028813 [patent_doc_number] => 05341509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Parallel processing system including a stack of bus-printed disks and a plurality of radially exending processing unit boards' [patent_app_type] => 1 [patent_app_number] => 7/788470 [patent_app_country] => US [patent_app_date] => 1991-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2589 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/341/05341509.pdf [firstpage_image] =>[orig_patent_app_number] => 788470 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/788470
Parallel processing system including a stack of bus-printed disks and a plurality of radially exending processing unit boards Nov 5, 1991 Issued
07/781481 ON-LINE VIDEO EDITING SYSTEM Oct 20, 1991 Abandoned
07/776931 HARDWARE-CONFIGURED OPERATING SYSTEM KERNEL HAVING A PARALLEL- SEARCHABLE EVENT QUEUE Oct 14, 1991 Abandoned
07/774972 METHOD OF EXTRACTING AND EDITING MESSAGE BLOCKS IN TELECOMMUNICATIONS MANAGEMENT NETWORK Oct 14, 1991 Abandoned
07/774865 SIGNAL PROCESSING APPARATUS Oct 10, 1991 Abandoned
07/771169 EXPANDABLE COMMUNICATION SYSTEM WITH DATA FLOW CONTROL Oct 2, 1991 Abandoned
Array ( [id] => 3474098 [patent_doc_number] => 05469545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Expandable communication system with data flow control' [patent_app_type] => 1 [patent_app_number] => 8/335557 [patent_app_country] => US [patent_app_date] => 1994-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 27688 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 1064 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469545.pdf [firstpage_image] =>[orig_patent_app_number] => 335557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/335557
Process for making theta-1 zeolite Dec 28, 1981 Issued
Array ( [id] => 3474098 [patent_doc_number] => 05469545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Expandable communication system with data flow control' [patent_app_type] => 1 [patent_app_number] => 8/335557 [patent_app_country] => US [patent_app_date] => 1994-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 27688 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 1064 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469545.pdf [firstpage_image] =>[orig_patent_app_number] => 335557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/335557
Process for making theta-1 zeolite Dec 28, 1981 Issued
Menu