Search

Seokjin Kim

Examiner (ID: 6504, Phone: (571)272-1487 , Office: P/2844 )

Most Active Art Unit
2844
Art Unit(s)
2844, 2865
Total Applications
690
Issued Applications
515
Pending Applications
81
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18236330 [patent_doc_number] => 11600899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Route-based directional antenna [patent_app_type] => utility [patent_app_number] => 16/958484 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16958484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/958484
Route-based directional antenna Dec 27, 2018 Issued
Array ( [id] => 17410642 [patent_doc_number] => 11251542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Antenna array for a radar sensor [patent_app_type] => utility [patent_app_number] => 16/965991 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1977 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16965991 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/965991
Antenna array for a radar sensor Dec 13, 2018 Issued
Array ( [id] => 14241483 [patent_doc_number] => 20190132914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => LED LIGHTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/219430 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219430
LED LIGHTING DEVICE Dec 12, 2018 Abandoned
Array ( [id] => 16982077 [patent_doc_number] => 20210226314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => ANTENNA STEERING AND LOCKING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/769006 [patent_app_country] => US [patent_app_date] => 2018-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16769006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/769006
Antenna steering and locking apparatus Dec 4, 2018 Issued
Array ( [id] => 16889438 [patent_doc_number] => 20210175635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => COMPACT PHASED ARRAY MILLIMETER WAVE COMMUNICATIONS SYSTEMS SUITABLE FOR FIXED WIRELESS ACCESS APPLICATIONS [patent_app_type] => utility [patent_app_number] => 16/770658 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16770658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/770658
COMPACT PHASED ARRAY MILLIMETER WAVE COMMUNICATIONS SYSTEMS SUITABLE FOR FIXED WIRELESS ACCESS APPLICATIONS Dec 3, 2018 Abandoned
Array ( [id] => 14383745 [patent_doc_number] => 20190165785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => INPUT/OUTPUT CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/202012 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202012
Input/output circuit Nov 26, 2018 Issued
Array ( [id] => 14192429 [patent_doc_number] => 20190115920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => Configurable Computing-Array Package Implementing Complex Math Functions [patent_app_type] => utility [patent_app_number] => 16/199204 [patent_app_country] => US [patent_app_date] => 2018-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199204
Configurable Computing-Array Package Implementing Complex Math Functions Nov 24, 2018 Abandoned
Array ( [id] => 14192431 [patent_doc_number] => 20190115921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => Configurable Computing-Array Package [patent_app_type] => utility [patent_app_number] => 16/199178 [patent_app_country] => US [patent_app_date] => 2018-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199178
Configurable Computing-Array Package Nov 23, 2018 Abandoned
Array ( [id] => 16456868 [patent_doc_number] => 20200366294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => RECONFIGURABLE LOGIC CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/766170 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766170 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/766170
Reconfigurable logic circuit Nov 18, 2018 Issued
Array ( [id] => 14080935 [patent_doc_number] => 20190089355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => SYSTEMS AND METHODS FOR LEVERAGING PATH DELAY VARIATIONS IN A CIRCUIT AND GENERATING ERROR-TOLERANT BITSTRINGS [patent_app_type] => utility [patent_app_number] => 16/185921 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185921 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185921
Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings Nov 8, 2018 Issued
Array ( [id] => 17303600 [patent_doc_number] => 20210399439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/289760 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17289760 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/289760
COMMUNICATION SYSTEM Nov 8, 2018 Abandoned
Array ( [id] => 15704887 [patent_doc_number] => 10608636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-31 [patent_title] => SiC JFET logic output level-shifting using integrated-series forward-biased JFET gate-to-channel diode junctions [patent_app_type] => utility [patent_app_number] => 16/183130 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1269 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183130
SiC JFET logic output level-shifting using integrated-series forward-biased JFET gate-to-channel diode junctions Nov 6, 2018 Issued
Array ( [id] => 14673353 [patent_doc_number] => 10374605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Logical elements with switchable connections in a reconfigurable fabric [patent_app_type] => utility [patent_app_number] => 16/176922 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8196 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/176922
Logical elements with switchable connections in a reconfigurable fabric Oct 30, 2018 Issued
Array ( [id] => 15842687 [patent_doc_number] => 20200136626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => DIRECT CURRENT POWERED CLOCKLESS SUPERCONDUCTING LOGIC FAMILY USING DYNAMIC INTERNAL STATE [patent_app_type] => utility [patent_app_number] => 16/174982 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174982 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174982
Direct current powered clockless superconducting logic family using dynamic internal state Oct 29, 2018 Issued
Array ( [id] => 15063281 [patent_doc_number] => 10461964 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-29 [patent_title] => High output swing high voltage tolerant bus driver [patent_app_type] => utility [patent_app_number] => 16/169757 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/169757
High output swing high voltage tolerant bus driver Oct 23, 2018 Issued
Array ( [id] => 13882629 [patent_doc_number] => 20190037655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => MULTIPLE LINEAR REGULATION [patent_app_type] => utility [patent_app_number] => 16/151027 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16151027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/151027
Multiple linear regulation Oct 2, 2018 Issued
Array ( [id] => 14986689 [patent_doc_number] => 10447270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Low power logic circuitry [patent_app_type] => utility [patent_app_number] => 16/148977 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4479 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148977
Low power logic circuitry Sep 30, 2018 Issued
Array ( [id] => 13910615 [patent_doc_number] => 20190044512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => CALIBRATED BIASING OF SLEEP TRANSISTOR IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/145598 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145598
Calibrated biasing of sleep transistor in integrated circuits Sep 27, 2018 Issued
Array ( [id] => 15719341 [patent_doc_number] => 20200106438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => AUTO-CORRECTED IO DRIVER ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/145839 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145839 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145839
Auto-corrected IO driver architecture Sep 27, 2018 Issued
Array ( [id] => 16242020 [patent_doc_number] => 20200259254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => ANTENNA SYSTEM AND TERMINAL [patent_app_type] => utility [patent_app_number] => 16/648400 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16648400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/648400
Antenna system and terminal Sep 24, 2018 Issued
Menu