Search

Seong-ah A. Shin

Examiner (ID: 19172)

Most Active Art Unit
2659
Art Unit(s)
2659, 2658
Total Applications
475
Issued Applications
347
Pending Applications
50
Abandoned Applications
88

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18423679 [patent_doc_number] => 20230178143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => Logical to Encoded Value Table in Data Storage Device [patent_app_type] => utility [patent_app_number] => 17/540682 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17540682 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/540682
Logical to encoded value table in data storage device Dec 1, 2021 Issued
Array ( [id] => 18839977 [patent_doc_number] => 11848056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Quasi-volatile memory with enhanced sense amplifier operation [patent_app_type] => utility [patent_app_number] => 17/529083 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 10196 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17529083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/529083
Quasi-volatile memory with enhanced sense amplifier operation Nov 16, 2021 Issued
Array ( [id] => 18766734 [patent_doc_number] => 11817141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Refresh control circuit and memory [patent_app_type] => utility [patent_app_number] => 17/453890 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4749 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453890
Refresh control circuit and memory Nov 7, 2021 Issued
Array ( [id] => 18174970 [patent_doc_number] => 11574687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Feedback for power management of a memory die using capacitive coupling [patent_app_type] => utility [patent_app_number] => 17/514858 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514858
Feedback for power management of a memory die using capacitive coupling Oct 28, 2021 Issued
Array ( [id] => 17900481 [patent_doc_number] => 20220310143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SIGNAL GENERATION CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/504583 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504583
Signal generation circuit and memory Oct 18, 2021 Issued
Array ( [id] => 18120359 [patent_doc_number] => 11551757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/505011 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8448 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/505011
Memory device and operating method thereof Oct 18, 2021 Issued
Array ( [id] => 18857022 [patent_doc_number] => 11854613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Program and read operations using different gray codes and memory device for performing the same [patent_app_type] => utility [patent_app_number] => 17/502489 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502489 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502489
Program and read operations using different gray codes and memory device for performing the same Oct 14, 2021 Issued
Array ( [id] => 18721277 [patent_doc_number] => 11798629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Nonvolatile memory device, storage device, and operating method of nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 17/489988 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 13179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489988
Nonvolatile memory device, storage device, and operating method of nonvolatile memory device Sep 29, 2021 Issued
Array ( [id] => 20132094 [patent_doc_number] => 12374411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Three-dimensional flash memory for improving integration and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/249942 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1269 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18249942 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/249942
Three-dimensional flash memory for improving integration and operation method thereof Sep 27, 2021 Issued
Array ( [id] => 18281944 [patent_doc_number] => 20230097416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => 3D FLASH MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/488128 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488128 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488128
3D flash memory and operation method thereof Sep 27, 2021 Issued
Array ( [id] => 18890784 [patent_doc_number] => 11869561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Spin orbit-torque magnetic random-access memory (SOT-MRAM) with cross-point spin hall effect (SHE) write lines and remote sensing read magnetic tunnel-junction (MTJ) [patent_app_type] => utility [patent_app_number] => 17/483755 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 6600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483755
Spin orbit-torque magnetic random-access memory (SOT-MRAM) with cross-point spin hall effect (SHE) write lines and remote sensing read magnetic tunnel-junction (MTJ) Sep 22, 2021 Issued
Array ( [id] => 18645480 [patent_doc_number] => 11769558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Method of reducing random telegraph noise in non-volatile memory by grouping and screening memory cells [patent_app_type] => utility [patent_app_number] => 17/482095 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4968 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482095
Method of reducing random telegraph noise in non-volatile memory by grouping and screening memory cells Sep 21, 2021 Issued
Array ( [id] => 18704481 [patent_doc_number] => 11790997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/471569 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 22554 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471569
Memory system Sep 9, 2021 Issued
Array ( [id] => 18243934 [patent_doc_number] => 20230076245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => PROGRAM DEPENDENT BIASING OF UNSELECTED SUB-BLOCKS [patent_app_type] => utility [patent_app_number] => 17/469016 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469016
Program dependent biasing of unselected sub-blocks Sep 7, 2021 Issued
Array ( [id] => 18623580 [patent_doc_number] => 11756633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 17/461848 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461848
Semiconductor storage device Aug 29, 2021 Issued
Array ( [id] => 18223880 [patent_doc_number] => 20230062874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ONON SIDEWALL STRUCTURE FOR MEMORY DEVICE AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/459330 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459330 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459330
ONON sidewall structure for memory device and methods of making the same Aug 26, 2021 Issued
Array ( [id] => 17779863 [patent_doc_number] => 20220246213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => Memory Device [patent_app_type] => utility [patent_app_number] => 17/459420 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459420
Memory device Aug 26, 2021 Issued
Array ( [id] => 17925691 [patent_doc_number] => 11468951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Method for programming flash memory [patent_app_type] => utility [patent_app_number] => 17/458186 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3269 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458186 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458186
Method for programming flash memory Aug 25, 2021 Issued
Array ( [id] => 18222349 [patent_doc_number] => 20230061343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ELECTRICAL FUSE BIT CELL IN INTEGRATED CIRCUIT HAVING BACKSIDE CONDUCTING LINES [patent_app_type] => utility [patent_app_number] => 17/412999 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412999
Electrical fuse bit cell in integrated circuit having backside conducting lines Aug 25, 2021 Issued
Array ( [id] => 17278057 [patent_doc_number] => 20210384255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => MEMORY CELL WITH UNIPOLAR SELECTORS [patent_app_type] => utility [patent_app_number] => 17/411451 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411451
Memory cell with unipolar selectors Aug 24, 2021 Issued
Menu