Seong-ah A. Shin

Array ( [id] => 2800772 [patent_doc_number] => 05103417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-07 [patent_title] => 'Digital multi-channel counter method and apparatus to reduce counting hardware' [patent_app_type] => 1 [patent_app_number] => 7/475525 [patent_app_country] => US [patent_app_date] => 1990-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1797 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/103/05103417.pdf [firstpage_image] =>[orig_patent_app_number] => 475525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2715604 [patent_doc_number] => 05068818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Hardware implemented moving average processor' [patent_app_type] => 1 [patent_app_number] => 7/461966 [patent_app_country] => US [patent_app_date] => 1990-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5603 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068818.pdf [firstpage_image] =>[orig_patent_app_number] => 461966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678129 [patent_doc_number] => 04999796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'Sticky bit detection and shifting logic' [patent_app_type] => 1 [patent_app_number] => 7/450796 [patent_app_country] => US [patent_app_date] => 1989-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3247 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999796.pdf [firstpage_image] =>[orig_patent_app_number] => 450796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2716639 [patent_doc_number] => 04982352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Methods and apparatus for determining the absolute value of the difference between binary operands' [patent_app_type] => 1 [patent_app_number] => 7/441040 [patent_app_country] => US [patent_app_date] => 1989-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 12896 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/982/04982352.pdf [firstpage_image] =>[orig_patent_app_number] => 441040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2797741 [patent_doc_number] => 05101369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-31 [patent_title] => 'Digital filter capable of sample rate alteration' [patent_app_type] => 1 [patent_app_number] => 7/439536 [patent_app_country] => US [patent_app_date] => 1989-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 9460 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/101/05101369.pdf [firstpage_image] =>[orig_patent_app_number] => 439536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2739312 [patent_doc_number] => 05032865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-16 [patent_title] => 'Calculating the dot product of large dimensional vectors in two\'s complement representation' [patent_app_type] => 1 [patent_app_number] => 7/440019 [patent_app_country] => US [patent_app_date] => 1989-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1897 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/032/05032865.pdf [firstpage_image] =>[orig_patent_app_number] => 440019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2800790 [patent_doc_number] => 05103418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-07 [patent_title] => 'Dangerous range detector for floating point adder' [patent_app_type] => 1 [patent_app_number] => 7/438376 [patent_app_country] => US [patent_app_date] => 1989-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1370 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/103/05103418.pdf [firstpage_image] =>[orig_patent_app_number] => 438376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2757720 [patent_doc_number] => 05038314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Method and apparatus for correction of underflow and overflow' [patent_app_type] => 1 [patent_app_number] => 7/438636 [patent_app_country] => US [patent_app_date] => 1989-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6530 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038314.pdf [firstpage_image] =>[orig_patent_app_number] => 438636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2725195 [patent_doc_number] => 05053987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Arithmetic unit in a vector signal processor using pipelined computational blocks' [patent_app_type] => 1 [patent_app_number] => 7/430815 [patent_app_country] => US [patent_app_date] => 1989-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 4784 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053987.pdf [firstpage_image] =>[orig_patent_app_number] => 430815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2766527 [patent_doc_number] => 05043933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Interpolation filter of cascaded integrator-comb type' [patent_app_type] => 1 [patent_app_number] => 7/427285 [patent_app_country] => US [patent_app_date] => 1989-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4111 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043933.pdf [firstpage_image] =>[orig_patent_app_number] => 427285 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2731322 [patent_doc_number] => 05025405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-18 [patent_title] => 'Method of interpolating pixel values' [patent_app_type] => 1 [patent_app_number] => 7/421298 [patent_app_country] => US [patent_app_date] => 1989-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 7 [patent_no_of_words] => 4560 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/025/05025405.pdf [firstpage_image] =>[orig_patent_app_number] => 421298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2716451 [patent_doc_number] => 05001664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Dividing circuit calculating a quotient of K m-ary digits in K machine cycles' [patent_app_type] => 1 [patent_app_number] => 7/419275 [patent_app_country] => US [patent_app_date] => 1989-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4852 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 481 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001664.pdf [firstpage_image] =>[orig_patent_app_number] => 419275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2698253 [patent_doc_number] => 05050120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Residue addition overflow detection processor' [patent_app_type] => 1 [patent_app_number] => 7/414276 [patent_app_country] => US [patent_app_date] => 1989-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7131 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050120.pdf [firstpage_image] =>[orig_patent_app_number] => 414276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2826992 [patent_doc_number] => 05081604 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Finite impulse response (FIR) filter using a plurality of cascaded digital signal processors (DSPs)' [patent_app_type] => 1 [patent_app_number] => 7/415326 [patent_app_country] => US [patent_app_date] => 1989-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5040 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 448 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081604.pdf [firstpage_image] =>[orig_patent_app_number] => 415326 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2905166 [patent_doc_number] => 05184316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'System for very efficiently coding by performing interblock and intrablock normalization' [patent_app_type] => 1 [patent_app_number] => 7/407165 [patent_app_country] => US [patent_app_date] => 1989-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6818 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/184/05184316.pdf [firstpage_image] =>[orig_patent_app_number] => 407165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2708124 [patent_doc_number] => 04989167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-29 [patent_title] => 'Desktop computer terminal having an angularly adjustable electronic display module' [patent_app_type] => 1 [patent_app_number] => 7/405276 [patent_app_country] => US [patent_app_date] => 1989-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2357 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/989/04989167.pdf [firstpage_image] =>[orig_patent_app_number] => 405276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2682495 [patent_doc_number] => 05027309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Digital division circuit using N/M-bit subtractor for N subtractions' [patent_app_type] => 1 [patent_app_number] => 7/400135 [patent_app_country] => US [patent_app_date] => 1989-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5811 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027309.pdf [firstpage_image] =>[orig_patent_app_number] => 400135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2827011 [patent_doc_number] => 05081605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Digital filter' [patent_app_type] => 1 [patent_app_number] => 7/401574 [patent_app_country] => US [patent_app_date] => 1989-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1527 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081605.pdf [firstpage_image] =>[orig_patent_app_number] => 401574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678448 [patent_doc_number] => 05073869 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-17 [patent_title] => 'Suppression of spurious frequency components in direct digital frequency synthesizer' [patent_app_type] => 1 [patent_app_number] => 7/398735 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2429 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/073/05073869.pdf [firstpage_image] =>[orig_patent_app_number] => 398735 [rel_patent_id] =>[rel_patent_doc_number] =>)