Search

Sepehr Azari

Examiner (ID: 9745, Phone: (571)270-7903 , Office: P/2699 )

Most Active Art Unit
2621
Art Unit(s)
2699, 2691, 2621
Total Applications
620
Issued Applications
452
Pending Applications
49
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17151146 [patent_doc_number] => 11144223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Flash memory initialization scheme for writing boot up information into selected storage locations averagely and randomly distributed over more storage locations and correspondingly method for reading boot up information from selected storage locations [patent_app_type] => utility [patent_app_number] => 16/747551 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5692 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747551 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/747551
Flash memory initialization scheme for writing boot up information into selected storage locations averagely and randomly distributed over more storage locations and correspondingly method for reading boot up information from selected storage locations Jan 20, 2020 Issued
Array ( [id] => 17223435 [patent_doc_number] => 11175936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Dynamic I/O virtualization system having guest memory management for mapping virtual addresses in a hybrid address space [patent_app_type] => utility [patent_app_number] => 16/744773 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 17131 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744773
Dynamic I/O virtualization system having guest memory management for mapping virtual addresses in a hybrid address space Jan 15, 2020 Issued
Array ( [id] => 16964716 [patent_doc_number] => 20210216215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => DATA COMPRESSION FOR DIRECTLY CONNECTED HOST [patent_app_type] => utility [patent_app_number] => 16/742955 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742955
Data compression for having one direct connection between host and port of storage system via internal fabric interface Jan 14, 2020 Issued
Array ( [id] => 15902915 [patent_doc_number] => 20200150977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => REQUEST PROCESSING METHOD, SYSTEM ON CHIP, AND PUBLIC CLOUD MANAGEMENT COMPONENT [patent_app_type] => utility [patent_app_number] => 16/743131 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16743131 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/743131
Request processing method, system on chip, and public cloud management component Jan 14, 2020 Issued
Array ( [id] => 17016737 [patent_doc_number] => 11086374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Transmission interface circuit having a plurality of power supply paths whereby transmission are placed in one of a conductive or nonconductive state [patent_app_type] => utility [patent_app_number] => 16/744143 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4024 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744143 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744143
Transmission interface circuit having a plurality of power supply paths whereby transmission are placed in one of a conductive or nonconductive state Jan 14, 2020 Issued
Array ( [id] => 16178927 [patent_doc_number] => 20200225895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => CHANGING OVER A GENERAL PURPOSE OS DISPLAY TO A DEDICATED DISPLAY SCREEN [patent_app_type] => utility [patent_app_number] => 16/738741 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16738741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/738741
Extending bios control over a general purpose OS display to a dedicated display screen based on connected external peripheral Jan 8, 2020 Issued
Array ( [id] => 16400967 [patent_doc_number] => 20200341825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => METHODS AND SYSTEMS FOR MANAGING COMMUNICATION BETWEEN A UFS DEVICE AND A HOST [patent_app_type] => utility [patent_app_number] => 16/737547 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16737547 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/737547
Methods and systems for managing communication lanes between a universal flash storage (USF) device and a USF host Jan 7, 2020 Issued
Array ( [id] => 16478357 [patent_doc_number] => 10853305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel [patent_app_type] => utility [patent_app_number] => 16/732990 [patent_app_country] => US [patent_app_date] => 2020-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/732990
Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel Jan 1, 2020 Issued
Array ( [id] => 16584832 [patent_doc_number] => 20210019234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => METHOD, ELECTRONIC DEVICE AND COMPUTER PROGRAM PRODUCT FOR MANAGING BACKUP DATA [patent_app_type] => utility [patent_app_number] => 16/724662 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724662 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724662
Method for managing backup data on first, second, or third virtual machine management platform Dec 22, 2019 Issued
Array ( [id] => 16314713 [patent_doc_number] => 20200293451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => MEMORY SYSTEM FOR MEMORY SHARING AND DATA PROCESSING SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/718558 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718558
Operating method of memory system that checks stored data that is reused and generating a flag/bit signal Dec 17, 2019 Issued
Array ( [id] => 18053878 [patent_doc_number] => 11527269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Memory channels calibration during boot wherein channels are calibrated in parallel based on identifers [patent_app_type] => utility [patent_app_number] => 16/716616 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16716616 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/716616
Memory channels calibration during boot wherein channels are calibrated in parallel based on identifers Dec 16, 2019 Issued
Array ( [id] => 15773199 [patent_doc_number] => 20200117617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => SYSTEM AND METHOD FOR APPLICATION MIGRATION FOR A DOCKABLE DEVICE [patent_app_type] => utility [patent_app_number] => 16/706282 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706282 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706282
System and method for application migration for a dockable device Dec 5, 2019 Issued
Array ( [id] => 16592664 [patent_doc_number] => 10901927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Adaptive interface storage device with multiple storage protocols including NVME and NVME over fabrics storage devices [patent_app_type] => utility [patent_app_number] => 16/696649 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696649 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696649
Adaptive interface storage device with multiple storage protocols including NVME and NVME over fabrics storage devices Nov 25, 2019 Issued
Array ( [id] => 16116125 [patent_doc_number] => 20200210085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => METHOD FOR PERFORMING CONFIGURATION MANAGEMENT, AND ASSOCIATED DATA STORAGE DEVICE AND CONTROLLER THEREOF [patent_app_type] => utility [patent_app_number] => 16/690057 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690057 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690057
Data storage device using general purpose input/output (GPIO) and electronic fuse (eFUSE) circuit for configuration of read only memory (ROM) code Nov 19, 2019 Issued
Array ( [id] => 16698500 [patent_doc_number] => 10949097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Peripheral component interconnect express (PCIE) network with input/output (I/O) operation chaining to reduce communication time within execution of I/O channel operations [patent_app_type] => utility [patent_app_number] => 16/682481 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682481
Peripheral component interconnect express (PCIE) network with input/output (I/O) operation chaining to reduce communication time within execution of I/O channel operations Nov 12, 2019 Issued
Array ( [id] => 16288978 [patent_doc_number] => 10765802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => System and method for insulin pump medical device including a slider assembly wherein images on display allow for highlighting and magnifying images [patent_app_type] => utility [patent_app_number] => 16/679443 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4818 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679443
System and method for insulin pump medical device including a slider assembly wherein images on display allow for highlighting and magnifying images Nov 10, 2019 Issued
Array ( [id] => 16486055 [patent_doc_number] => 20200379660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => Data Migration to a New Device [patent_app_type] => utility [patent_app_number] => 16/677530 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/677530
Data migration synchronization process using a manifest from a source device to a new destination device Nov 6, 2019 Issued
Array ( [id] => 16810243 [patent_doc_number] => 20210132798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => CAPACITY EXPANSION FOR MEMORY SUB-SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/672321 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/672321
Capacity expansion channels for memory sub-systems Oct 31, 2019 Issued
Array ( [id] => 16810252 [patent_doc_number] => 20210132807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => METHOD AND SYSTEM FOR OPTIMIZING A HOST COMPUTING DEVICE POWER DOWN THROUGH OFFLOAD CAPABILITIES [patent_app_type] => utility [patent_app_number] => 16/670669 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670669 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/670669
Method and system for optimizing a host computing device power down through offload capabilities Oct 30, 2019 Issued
Array ( [id] => 16780127 [patent_doc_number] => 20210117206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SYSTEM AND METHOD FOR RETRAINING MEMORY IN AN INFORMATION HANDLING SYSTEM [patent_app_type] => utility [patent_app_number] => 16/657298 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657298
Dual inline memory module with multiple boot processes based on first and second environmental conditions Oct 17, 2019 Issued
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