Search

Sepehr Azari

Examiner (ID: 9745, Phone: (571)270-7903 , Office: P/2699 )

Most Active Art Unit
2621
Art Unit(s)
2699, 2691, 2621
Total Applications
620
Issued Applications
452
Pending Applications
49
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16478016 [patent_doc_number] => 10852962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Parallel input/output (I/O) replicating incoming data emulating fiber connection (FICON) in shared memory [patent_app_type] => utility [patent_app_number] => 16/520727 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5892 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520727 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520727
Parallel input/output (I/O) replicating incoming data emulating fiber connection (FICON) in shared memory Jul 23, 2019 Issued
Array ( [id] => 16683385 [patent_doc_number] => 10942863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Security configurations in page table entries for execution domains using a sandbox application operation [patent_app_type] => utility [patent_app_number] => 16/520296 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6238 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520296
Security configurations in page table entries for execution domains using a sandbox application operation Jul 22, 2019 Issued
Array ( [id] => 15594585 [patent_doc_number] => 20200073827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => Domain Register for Instructions being Executed in Computer Processors [patent_app_type] => utility [patent_app_number] => 16/520298 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520298
Memory configured to store predefined set of domain registers for instructions being executed in computer processors Jul 22, 2019 Issued
Array ( [id] => 16706131 [patent_doc_number] => 10956062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Aggregating separate data within a single data log wherein single data log is divided in a plurality of blocks assigned to plurality of different streams [patent_app_type] => utility [patent_app_number] => 16/506895 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506895 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506895
Aggregating separate data within a single data log wherein single data log is divided in a plurality of blocks assigned to plurality of different streams Jul 8, 2019 Issued
Array ( [id] => 15870415 [patent_doc_number] => 20200142611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => STORAGE DEVICE PROVIDING DISCONNECTION FROM HOST WITHOUT LOSS OF DATA [patent_app_type] => utility [patent_app_number] => 16/506579 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506579 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506579
Storage device providing disconnection from host without loss of data Jul 8, 2019 Issued
Array ( [id] => 16577246 [patent_doc_number] => 20210011647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => IDENTIFYING AND RELOCATING HOT DATA TO A CACHE DETERMINED WITH READ VELOCITY BASED ON A THRESHOLD STORED AT A STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/506894 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506894
Identifying and relocating hot data to a cache determined with read velocity based on a threshold stored at a storage device Jul 8, 2019 Issued
Array ( [id] => 17311155 [patent_doc_number] => 11212286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Automatically deployed information technology (IT) system and method [patent_app_type] => utility [patent_app_number] => 16/505267 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 64 [patent_no_of_words] => 44806 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505267
Automatically deployed information technology (IT) system and method Jul 7, 2019 Issued
Array ( [id] => 16232717 [patent_doc_number] => 10740267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => Digital interface circuit for analog-to-digital converter [patent_app_type] => utility [patent_app_number] => 16/503243 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503243 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503243
Digital interface circuit for analog-to-digital converter Jul 2, 2019 Issued
Array ( [id] => 15560977 [patent_doc_number] => 20200064900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => USB INTERFACE SYSTEM CAPABLE OF AUTOMATICALLY ADJUSTING CONNECTION SPEED AND POWER CONSUMPTION CAPABILITIES AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/458258 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3713 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458258 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458258
USB interface system capable of automatically adjusting connection speed and power consumption capabilities and method thereof Jun 30, 2019 Issued
Array ( [id] => 16431612 [patent_doc_number] => 10831694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Multi-host network interface controller (NIC) with external peripheral component bus cable including plug termination management [patent_app_type] => utility [patent_app_number] => 16/446632 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6499 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446632 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446632
Multi-host network interface controller (NIC) with external peripheral component bus cable including plug termination management Jun 19, 2019 Issued
Array ( [id] => 16527458 [patent_doc_number] => 20200401538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => INTEGRATED CIRCUITS FOR GENERATING INPUT/OUTPUT LATENCY PERFORMANCE METRICS USING REAL-TIME CLOCK (RTC) READ MEASUREMENT MODULE [patent_app_type] => utility [patent_app_number] => 16/445500 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445500
Integrated circuits for generating input/output latency performance metrics using real-time clock (RTC) read measurement module Jun 18, 2019 Issued
Array ( [id] => 16171639 [patent_doc_number] => 10713209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interface [patent_app_type] => utility [patent_app_number] => 16/446470 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 21185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446470
Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interface Jun 18, 2019 Issued
Array ( [id] => 14872707 [patent_doc_number] => 20190286595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => MULTI-PROTOCOL IO INFRASTRUCTURE FOR A FLEXIBLE STORAGE PLATFORM [patent_app_type] => utility [patent_app_number] => 16/433838 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433838 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433838
Multi-protocol I/O infrastructure for a flexible storage platform Jun 5, 2019 Issued
Array ( [id] => 18130142 [patent_doc_number] => 11556350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Electronic device and method for setting at least one specified pin read during booting stage when configurating a display panel dynamically [patent_app_type] => utility [patent_app_number] => 16/430224 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2489 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430224 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430224
Electronic device and method for setting at least one specified pin read during booting stage when configurating a display panel dynamically Jun 2, 2019 Issued
Array ( [id] => 15594119 [patent_doc_number] => 20200073594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => FORWARD CACHING APPLICATION PROGRAMMING INTERFACE SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/428168 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428168
Forward caching application programming interface systems and methods May 30, 2019 Issued
Array ( [id] => 18248865 [patent_doc_number] => 11605461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Risk-based control-to-range blood glucose diabetes management device [patent_app_type] => utility [patent_app_number] => 16/416787 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416787 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416787
Risk-based control-to-range blood glucose diabetes management device May 19, 2019 Issued
Array ( [id] => 16439102 [patent_doc_number] => 20200356428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => CONNECTING COMPONENTS OF A DATA PIPELINE USING A PLUGGABLE TOPOLOGY [patent_app_type] => utility [patent_app_number] => 16/405586 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405586
Data pipeline using a pluggable topology connecting components without altering code of the components May 6, 2019 Issued
Array ( [id] => 16439172 [patent_doc_number] => 20200356498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => CONNECTIVITY TYPE DETECTION FOR A DATA STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/404646 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16404646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/404646
Connectivity type detection using a transport protocol and command protocol of the data storage system May 5, 2019 Issued
Array ( [id] => 14750681 [patent_doc_number] => 20190258514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => I/O Request Scheduling Method and Apparatus [patent_app_type] => utility [patent_app_number] => 16/401977 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/401977
I/O request scheduling method and apparatus by adjusting queue depth associated with storage device based on hige or low priority status May 1, 2019 Issued
Array ( [id] => 14690935 [patent_doc_number] => 20190244583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => METHODS, SYSTEMS, AND MEDIA FOR MANAGING OUTPUT OF AN HDMI SOURCE [patent_app_type] => utility [patent_app_number] => 16/384309 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384309
Methods, systems, and media for managing output of an HDMI source Apr 14, 2019 Issued
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