Search

Sepehr Azari

Examiner (ID: 9745, Phone: (571)270-7903 , Office: P/2699 )

Most Active Art Unit
2621
Art Unit(s)
2699, 2691, 2621
Total Applications
620
Issued Applications
452
Pending Applications
49
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20539335 [patent_doc_number] => 12556417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD [patent_app_type] => utility [patent_app_number] => 16/202079 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202079
Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD Nov 26, 2018 Issued
Array ( [id] => 20539335 [patent_doc_number] => 12556417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD [patent_app_type] => utility [patent_app_number] => 16/202079 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202079
Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD Nov 26, 2018 Issued
Array ( [id] => 20539335 [patent_doc_number] => 12556417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD [patent_app_type] => utility [patent_app_number] => 16/202079 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202079
Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD Nov 26, 2018 Issued
Array ( [id] => 20539335 [patent_doc_number] => 12556417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD [patent_app_type] => utility [patent_app_number] => 16/202079 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202079
Modular system (switch boards and mid-plane) for supporting 50G or 100G ethernet speeds of FPGA+SSD Nov 26, 2018 Issued
Array ( [id] => 14798709 [patent_doc_number] => 10402359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Interface compatible with M.2 connector socket for ultra high capacity solid state drive [patent_app_type] => utility [patent_app_number] => 16/184723 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6730 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184723
Interface compatible with M.2 connector socket for ultra high capacity solid state drive Nov 7, 2018 Issued
Array ( [id] => 14235373 [patent_doc_number] => 20190129859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => METHOD, DEVICE AND COMPUTER PROGRAM PRODUCT FOR CACHE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/173086 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173086
Method, device and computer program product for cache management Oct 28, 2018 Issued
Array ( [id] => 15386753 [patent_doc_number] => 10534561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-14 [patent_title] => Storage apparatus system and storage control method that outputs a busy state or ready state through a ready/busy pin [patent_app_type] => utility [patent_app_number] => 16/172944 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4861 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172944
Storage apparatus system and storage control method that outputs a busy state or ready state through a ready/busy pin Oct 28, 2018 Issued
Array ( [id] => 15043077 [patent_doc_number] => 20190332543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => METHOD, DEVICE AND COMPUTER PROGRAM PRODUCT FOR FLUSHING METADATA IN MULTI-CORE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/173131 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173131 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173131
Method, device and computer program product for flushing metadata in multi-core system Oct 28, 2018 Issued
Array ( [id] => 15887141 [patent_doc_number] => 10649915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Disaggregated computing architecture using device pass-through wherein independent physical address spaces between systems nodes are implemented in a single execution environment [patent_app_type] => utility [patent_app_number] => 16/172805 [patent_app_country] => US [patent_app_date] => 2018-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8905 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172805 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172805
Disaggregated computing architecture using device pass-through wherein independent physical address spaces between systems nodes are implemented in a single execution environment Oct 27, 2018 Issued
Array ( [id] => 16675620 [patent_doc_number] => 20210064386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => BOOTING DISC SUPPORTING FILE STORAGE FUNCTION [patent_app_type] => utility [patent_app_number] => 16/959389 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959389
Master boot record (MBR)/global unique identifer (GUID) partition table (GPT) hybrid disk that includes GPT bootstrap code Oct 17, 2018 Issued
Array ( [id] => 15106343 [patent_doc_number] => 10474496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => Dynamic multitasking for distributed storage systems by detecting events for triggering a context switch [patent_app_type] => utility [patent_app_number] => 16/162471 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162471 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162471
Dynamic multitasking for distributed storage systems by detecting events for triggering a context switch Oct 16, 2018 Issued
Array ( [id] => 18314189 [patent_doc_number] => 11628250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Temporary target glucose values for temporary reductions in fluid delivery [patent_app_type] => utility [patent_app_number] => 16/156801 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 85 [patent_no_of_words] => 56762 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16156801 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/156801
Temporary target glucose values for temporary reductions in fluid delivery Oct 9, 2018 Issued
Array ( [id] => 15425363 [patent_doc_number] => 10545610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Pen/touch tablet computer having multiple operation modes and method for switching operation modes [patent_app_type] => utility [patent_app_number] => 16/154262 [patent_app_country] => US [patent_app_date] => 2018-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 10691 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16154262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/154262
Pen/touch tablet computer having multiple operation modes and method for switching operation modes Oct 7, 2018 Issued
Array ( [id] => 14135877 [patent_doc_number] => 20190102328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => DETECTION OF A TIME CONDITION RELATIVE TO A TWO-WIRE BUS [patent_app_type] => utility [patent_app_number] => 16/148761 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148761
Detection of a time condition relative to a two-wire bus when writing into an EEPROM on a I2C bus Sep 30, 2018 Issued
Array ( [id] => 16232715 [patent_doc_number] => 10740265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => PCI-based bus system having peripheral device address translation based on base address register (BAR) index [patent_app_type] => utility [patent_app_number] => 16/144910 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10831 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144910 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/144910
PCI-based bus system having peripheral device address translation based on base address register (BAR) index Sep 26, 2018 Issued
Array ( [id] => 14235417 [patent_doc_number] => 20190129881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => HETEROGENEOUS VIRTUAL GENERAL-PURPOSE INPUT/OUTPUT [patent_app_type] => utility [patent_app_number] => 16/142419 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142419 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142419
Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus Sep 25, 2018 Issued
Array ( [id] => 15982457 [patent_doc_number] => 10671557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Dynamic component communication using general purpose links between respectively pooled together of like typed devices in disaggregated datacenters [patent_app_type] => utility [patent_app_number] => 16/141878 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 14865 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141878 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141878
Dynamic component communication using general purpose links between respectively pooled together of like typed devices in disaggregated datacenters Sep 24, 2018 Issued
Array ( [id] => 14217855 [patent_doc_number] => 20190121312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => OUTPUT UNIT, INPUT UNIT, AND INPUT-OUTPUT SYETEM [patent_app_type] => utility [patent_app_number] => 16/129825 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129825 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129825
OUTPUT UNIT, INPUT UNIT, AND INPUT-OUTPUT SYETEM Sep 12, 2018 Abandoned
Array ( [id] => 13845303 [patent_doc_number] => 20190026136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => DYNAMIC I/O VIRTUALIZATION [patent_app_type] => utility [patent_app_number] => 16/128913 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128913 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128913
Dynamic I/O virtualization system having guest memory management agent (MMA) for resolving page faults using hypercall to map a machine page into host memory Sep 11, 2018 Issued
Array ( [id] => 16220768 [patent_doc_number] => 20200245884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => Apparatus for Sensing Biosignals [patent_app_type] => utility [patent_app_number] => 16/648752 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16648752 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/648752
Apparatus and electronic circuitry for sensing biosignals Sep 9, 2018 Issued
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