Search

Sergio Jose Curbelo Iii

Examiner (ID: 16302, Phone: (571)270-7172 , Office: P/2193 )

Most Active Art Unit
2193
Art Unit(s)
2166, 2193
Total Applications
91
Issued Applications
50
Pending Applications
0
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15657257 [patent_doc_number] => 20200091159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => FinFET SRAM Having Discontinuous PMOS Fin Lines [patent_app_type] => utility [patent_app_number] => 16/692422 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692422
FinFET SRAM having discontinuous PMOS fin lines Nov 21, 2019 Issued
Array ( [id] => 16773970 [patent_doc_number] => 10985091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/691910 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 10622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691910 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691910
Semiconductor package Nov 21, 2019 Issued
Array ( [id] => 16858528 [patent_doc_number] => 20210159273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => CIRCUIT STRUCTURE AND METHOD FOR RESISTIVE RAM WITH SELF ALIGNED CONTACTS IN ZERO-VIA LAYER [patent_app_type] => utility [patent_app_number] => 16/691694 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691694 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691694
Circuit structure and method for resistive RAM with self aligned contacts in zero-via layer Nov 21, 2019 Issued
Array ( [id] => 16716009 [patent_doc_number] => 20210083156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => MICRO SEMICONDUCTOR CHIP, MICRO SEMICONDUCTOR STRUCTURE, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/691138 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691138
Micro semiconductor chip, micro semiconductor structure, and display device Nov 20, 2019 Issued
Array ( [id] => 16858525 [patent_doc_number] => 20210159270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => MRAM INTEGRATION INTO THE MOL FOR FAST 1T1M CELLS [patent_app_type] => utility [patent_app_number] => 16/690675 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690675
MRAM integration into the MOL for fast 1T1M cells Nov 20, 2019 Issued
Array ( [id] => 15717693 [patent_doc_number] => 20200105614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => VERTICAL SILICON/SILICON-GERMANIUM TRANSISTORS WITH MULTIPLE THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/686345 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/686345
Vertical silicon/silicon-germanium transistors with multiple threshold voltages Nov 17, 2019 Issued
Array ( [id] => 16812325 [patent_doc_number] => 20210134880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SYSTEM AND METHOD FOR NON-INVASIVE LARGE-SCALE QUBIT DEVICE CHARACTERIZATION TECHNIQUE [patent_app_type] => utility [patent_app_number] => 16/676304 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676304
System and method for non-invasive large-scale qubit device characterization technique Nov 5, 2019 Issued
Array ( [id] => 16835210 [patent_doc_number] => 11011470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-18 [patent_title] => Microelectronic package with mold-integrated components [patent_app_type] => utility [patent_app_number] => 16/667698 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667698
Microelectronic package with mold-integrated components Oct 28, 2019 Issued
Array ( [id] => 16774070 [patent_doc_number] => 10985192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Display driver semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/666705 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 12840 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666705
Display driver semiconductor device and manufacturing method thereof Oct 28, 2019 Issued
Array ( [id] => 15564961 [patent_doc_number] => 20200066892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => MONOLITHIC MICROWAVE INTEGRATED CIRCUITS HAVING BOTH ENHANCEMENT-MODE AND DEPLETION MODE TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/663843 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663843 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/663843
Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors Oct 24, 2019 Issued
Array ( [id] => 17325594 [patent_doc_number] => 11216608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Reduced area standard cell abutment configurations [patent_app_type] => utility [patent_app_number] => 16/664242 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 10797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664242
Reduced area standard cell abutment configurations Oct 24, 2019 Issued
Array ( [id] => 16653359 [patent_doc_number] => 10930552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Method of semiconductor integrated circuit fabrication [patent_app_type] => utility [patent_app_number] => 16/658862 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/658862
Method of semiconductor integrated circuit fabrication Oct 20, 2019 Issued
Array ( [id] => 15462315 [patent_doc_number] => 20200043982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => CORRELATED ELECTRON SWITCH STRUCTURES AND APPLICATIONS [patent_app_type] => utility [patent_app_number] => 16/600372 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600372
Correlated electron switch structures and applications Oct 10, 2019 Issued
Array ( [id] => 15503885 [patent_doc_number] => 20200052131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => Nanowire Stack GAA Device with Inner Spacer and Methods for Producing the Same [patent_app_type] => utility [patent_app_number] => 16/598750 [patent_app_country] => US [patent_app_date] => 2019-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16598750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/598750
Nanowire stack GAA device with inner spacer and methods for producing the same Oct 9, 2019 Issued
Array ( [id] => 16881370 [patent_doc_number] => 11031528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Display apparatus and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/595500 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 49 [patent_no_of_words] => 16850 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16595500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/595500
Display apparatus and manufacturing method thereof Oct 7, 2019 Issued
Array ( [id] => 17907833 [patent_doc_number] => 11461688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Simultaneously entangling gates for trapped-ion quantum computers [patent_app_type] => utility [patent_app_number] => 16/578137 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578137
Simultaneously entangling gates for trapped-ion quantum computers Sep 19, 2019 Issued
Array ( [id] => 16332381 [patent_doc_number] => 20200303347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/559521 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559521
Semiconductor storage device and method of manufacturing the same Sep 2, 2019 Issued
Array ( [id] => 17303336 [patent_doc_number] => 20210399175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => NITRIDE SEMICONDUCTOR DEVICE AND SUBSTRATE THEREOF, METHOD FOR FORMING RARE EARTH ELEMENT-ADDED NITRIDE LAYER, AND RED-LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/271173 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17271173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/271173
NITRIDE SEMICONDUCTOR DEVICE AND SUBSTRATE THEREOF, METHOD FOR FORMING RARE EARTH ELEMENT-ADDED NITRIDE LAYER, AND RED-LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME Aug 29, 2019 Pending
Array ( [id] => 16746391 [patent_doc_number] => 10971392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Amorphous metal thin film nonlinear resistor [patent_app_type] => utility [patent_app_number] => 16/556157 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 8547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556157
Amorphous metal thin film nonlinear resistor Aug 28, 2019 Issued
Array ( [id] => 16746391 [patent_doc_number] => 10971392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Amorphous metal thin film nonlinear resistor [patent_app_type] => utility [patent_app_number] => 16/556157 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 8547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556157
Amorphous metal thin film nonlinear resistor Aug 28, 2019 Issued
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