Search

Shahed Ahmed

Examiner (ID: 15878, Phone: (571)272-3477 , Office: P/2823 )

Most Active Art Unit
2813
Art Unit(s)
2813, 2823
Total Applications
1313
Issued Applications
1090
Pending Applications
150
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19055062 [patent_doc_number] => 20240097031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => FERRORELECTRIC FIELD-EFFECT TRANSISTOR (FEFET) DEVICES WITH LOW OPERATING VOLTAGE CAPABILITIES [patent_app_type] => utility [patent_app_number] => 17/947071 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947071
FERRORELECTRIC FIELD-EFFECT TRANSISTOR (FEFET) DEVICES WITH LOW OPERATING VOLTAGE CAPABILITIES Sep 15, 2022 Pending
Array ( [id] => 19038316 [patent_doc_number] => 20240088131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => DIODES WITH BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 17/943812 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943812 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943812
DIODES WITH BACKSIDE CONTACT Sep 12, 2022 Pending
Array ( [id] => 18570804 [patent_doc_number] => 20230261141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/942414 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/942414
Display device and method of manufacturing the same Sep 11, 2022 Issued
Array ( [id] => 18112868 [patent_doc_number] => 20230005748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => MASK LAYOUT, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/941272 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941272
Mask layout, semiconductor device and manufacturing method using the same Sep 8, 2022 Issued
Array ( [id] => 18266111 [patent_doc_number] => 20230087353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => Power Semiconductor Device and Method of Producing a Power Semiconductor Device [patent_app_type] => utility [patent_app_number] => 17/941052 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941052
Power semiconductor device and method of producing a power semiconductor device Sep 8, 2022 Issued
Array ( [id] => 18243063 [patent_doc_number] => 20230075374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SEMICONDUCTOR-ON-INSULATOR DEVICE WITH LIGHTLY DOPED EXTENSION REGION [patent_app_type] => utility [patent_app_number] => 17/939011 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939011
Semiconductor-on-insulator device with lightly doped extension region Sep 6, 2022 Issued
Array ( [id] => 19030066 [patent_doc_number] => 11929435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Ferroelectric gate stack for band-to-band tunneling reduction [patent_app_type] => utility [patent_app_number] => 17/899429 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 9844 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899429
Ferroelectric gate stack for band-to-band tunneling reduction Aug 29, 2022 Issued
Array ( [id] => 20581268 [patent_doc_number] => 12573522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Thin-film structure and semiconductor device comprising the same [patent_app_type] => utility [patent_app_number] => 17/897519 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897519
Thin-film structure and semiconductor device comprising the same Aug 28, 2022 Issued
Array ( [id] => 18670142 [patent_doc_number] => 11777054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-03 [patent_title] => Light-emitting diode with hyperbolic metamaterial [patent_app_type] => utility [patent_app_number] => 17/891930 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 33 [patent_no_of_words] => 6758 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891930 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891930
Light-emitting diode with hyperbolic metamaterial Aug 18, 2022 Issued
Array ( [id] => 19814090 [patent_doc_number] => 12245522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Coherent quantum information systems [patent_app_type] => utility [patent_app_number] => 17/890215 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2490 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890215
Coherent quantum information systems Aug 16, 2022 Issued
Array ( [id] => 18024677 [patent_doc_number] => 20220376176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHODS OF FORMING ELECTRONIC DEVICES COMPRISING METAL OXIDE MATERIALS [patent_app_type] => utility [patent_app_number] => 17/818313 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818313 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818313
METHODS OF FORMING ELECTRONIC DEVICES COMPRISING METAL OXIDE MATERIALS Aug 7, 2022 Pending
Array ( [id] => 18959247 [patent_doc_number] => 20240047574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => HIGH VOLTAGE SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/882390 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882390
High voltage semiconductor devices and methods of manufacturing thereof Aug 4, 2022 Issued
Array ( [id] => 18040277 [patent_doc_number] => 20220384494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => PHOTOELECTRIC CONVERSION APPARATUS, PHOTOELECTRIC CONVERSION SYSTEM, AND MOVABLE OBJECT [patent_app_type] => utility [patent_app_number] => 17/816135 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/816135
Photoelectric conversion apparatus, photoelectric conversion system, and movable object Jul 28, 2022 Issued
Array ( [id] => 18008481 [patent_doc_number] => 20220367248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE HAVING ISOLATION STRUCTURES WITH DIFFERENT THICKNESSES [patent_app_type] => utility [patent_app_number] => 17/877824 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877824
Method for forming semiconductor device having isolation structures with different thicknesses Jul 28, 2022 Issued
Array ( [id] => 20443044 [patent_doc_number] => 12513890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Memory structure and manufacturing method thereof, and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/815642 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 2229 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815642
Memory structure and manufacturing method thereof, and semiconductor structure Jul 27, 2022 Issued
Array ( [id] => 20268641 [patent_doc_number] => 12439653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Multi-layer hybrid edge termination for III-N power devices [patent_app_type] => utility [patent_app_number] => 17/876163 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876163
Multi-layer hybrid edge termination for III-N power devices Jul 27, 2022 Issued
Array ( [id] => 18008728 [patent_doc_number] => 20220367495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => POLYSILICON REMOVAL IN WORD LINE CONTACT REGION OF MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/815043 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815043 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815043
Polysilicon removal in word line contact region of memory devices Jul 25, 2022 Issued
Array ( [id] => 20734574 [patent_doc_number] => 12641839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Super-b bipolar junction transistor and manufacturing method therefor [patent_app_type] => utility [patent_app_number] => 18/254986 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18254986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/254986
Super-b bipolar junction transistor and manufacturing method therefor Jul 21, 2022 Issued
Array ( [id] => 18008871 [patent_doc_number] => 20220367638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => PASSIVATION LAYER FOR EPITAXIAL SEMICONDUCTOR PROCESS [patent_app_type] => utility [patent_app_number] => 17/869885 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869885 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869885
Passivation layer for epitaxial semiconductor process Jul 20, 2022 Issued
Array ( [id] => 18008936 [patent_doc_number] => 20220367703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => INNER SPACERS FOR GATE-ALL-AROUND TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/869163 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869163
Inner spacers for gate-all-around transistors Jul 19, 2022 Issued
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