
Shahed Ahmed
Examiner (ID: 15878, Phone: (571)272-3477 , Office: P/2823 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813, 2823 |
| Total Applications | 1313 |
| Issued Applications | 1090 |
| Pending Applications | 150 |
| Abandoned Applications | 104 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20319205
[patent_doc_number] => 12457767
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-28
[patent_title] => DEPFET transistor
[patent_app_type] => utility
[patent_app_number] => 18/659519
[patent_app_country] => US
[patent_app_date] => 2024-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1057
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659519
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/659519 | DEPFET transistor | May 8, 2024 | Issued |
Array
(
[id] => 19407110
[patent_doc_number] => 20240290621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => MASK LAYOUT, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/658646
[patent_app_country] => US
[patent_app_date] => 2024-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10898
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658646
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/658646 | Mask layout, semiconductor device and manufacturing method using the same | May 7, 2024 | Issued |
Array
(
[id] => 19797939
[patent_doc_number] => 12238938
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-02-25
[patent_title] => Random number generators including magnetic-tunnel-junction layer stacks
[patent_app_type] => utility
[patent_app_number] => 18/655453
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3400
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655453
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655453 | Random number generators including magnetic-tunnel-junction layer stacks | May 5, 2024 | Issued |
Array
(
[id] => 19392942
[patent_doc_number] => 20240282812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => HIGH VOLTAGE AVALANCHE DIODE FOR ACTIVE CLAMP DRIVERS
[patent_app_type] => utility
[patent_app_number] => 18/654186
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9000
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654186
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/654186 | High voltage avalanche diode for active clamp drivers | May 2, 2024 | Issued |
Array
(
[id] => 20324788
[patent_doc_number] => 20250336876
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => ELECTRONIC DEVICE WITH NICKEL TUNGSTEN BOTTOM PLATING
[patent_app_type] => utility
[patent_app_number] => 18/646357
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646357
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646357 | ELECTRONIC DEVICE WITH NICKEL TUNGSTEN BOTTOM PLATING | Apr 24, 2024 | Pending |
Array
(
[id] => 20324742
[patent_doc_number] => 20250336830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => DIE-TO-DIE LINKS USING SUBSTRATE AND METHOD OF MAKING
[patent_app_type] => utility
[patent_app_number] => 18/646337
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3579
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646337
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646337 | DIE-TO-DIE LINKS USING SUBSTRATE AND METHOD OF MAKING | Apr 24, 2024 | Pending |
Array
(
[id] => 20028912
[patent_doc_number] => 20250167134
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/646294
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2296
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646294
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646294 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME | Apr 24, 2024 | Pending |
Array
(
[id] => 19384840
[patent_doc_number] => 20240274710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => SIC MOSFET, SIC MOSFET PREPARATION METHOD, AND INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/645785
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7673
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645785
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645785 | SIC MOSFET, SIC MOSFET PREPARATION METHOD, AND INTEGRATED CIRCUIT | Apr 24, 2024 | Pending |
Array
(
[id] => 20324757
[patent_doc_number] => 20250336845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/645747
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645747
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645747 | PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME | Apr 24, 2024 | Pending |
Array
(
[id] => 19546759
[patent_doc_number] => 20240363795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => SEMICONDUCTOR OPTICAL ELEMENT, MEASUREMENT DEVICE AND LIGHT SOURCE DEVICE USING SEMICONDUCTOR OPTICAL ELEMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR OPTICAL ELEMENT
[patent_app_type] => utility
[patent_app_number] => 18/644418
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9102
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644418
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/644418 | SEMICONDUCTOR OPTICAL ELEMENT, MEASUREMENT DEVICE AND LIGHT SOURCE DEVICE USING SEMICONDUCTOR OPTICAL ELEMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR OPTICAL ELEMENT | Apr 23, 2024 | Pending |
Array
(
[id] => 19532035
[patent_doc_number] => 20240355937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => DIODE AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/641707
[patent_app_country] => US
[patent_app_date] => 2024-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4810
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641707
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/641707 | DIODE AND METHOD OF MAKING THE SAME | Apr 21, 2024 | Pending |
Array
(
[id] => 19662217
[patent_doc_number] => 20240429282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/637017
[patent_app_country] => US
[patent_app_date] => 2024-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9075
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637017
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/637017 | SEMICONDUCTOR DEVICE | Apr 15, 2024 | Pending |
Array
(
[id] => 20297952
[patent_doc_number] => 20250323195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-16
[patent_title] => MEMORY CHIPLET BOND PAD CONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 18/631149
[patent_app_country] => US
[patent_app_date] => 2024-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9173
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631149
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/631149 | MEMORY CHIPLET BOND PAD CONFIGURATION | Apr 9, 2024 | Pending |
Array
(
[id] => 19515957
[patent_doc_number] => 20240347643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => ANTI-AMBIPOLAR TRANSISTOR HAVING VERTICAL STRUCTURE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/632104
[patent_app_country] => US
[patent_app_date] => 2024-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/632104 | ANTI-AMBIPOLAR TRANSISTOR HAVING VERTICAL STRUCTURE AND METHOD OF MANUFACTURING THE SAME | Apr 9, 2024 | Pending |
Array
(
[id] => 19386820
[patent_doc_number] => 20240276690
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => Thermally-Conductive Electromagnetic Interference (EMI) Absorbers
[patent_app_type] => utility
[patent_app_number] => 18/628288
[patent_app_country] => US
[patent_app_date] => 2024-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8534
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628288
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/628288 | Thermally-Conductive Electromagnetic Interference (EMI) Absorbers | Apr 4, 2024 | Pending |
Array
(
[id] => 19384829
[patent_doc_number] => 20240274699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/625604
[patent_app_country] => US
[patent_app_date] => 2024-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16218
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625604
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/625604 | Semiconductor device and method for manufacturing the same | Apr 2, 2024 | Issued |
Array
(
[id] => 19335752
[patent_doc_number] => 20240250182
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/624513
[patent_app_country] => US
[patent_app_date] => 2024-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624513
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/624513 | Memory device | Apr 1, 2024 | Issued |
Array
(
[id] => 19531837
[patent_doc_number] => 20240355739
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/623187
[patent_app_country] => US
[patent_app_date] => 2024-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11296
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623187
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/623187 | Semiconductor devices with oxidized barriers | Mar 31, 2024 | Issued |
Array
(
[id] => 19384884
[patent_doc_number] => 20240274754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => DISPLAY MODULE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/621969
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8915
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621969
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/621969 | DISPLAY MODULE AND MANUFACTURING METHOD THEREOF | Mar 28, 2024 | Pending |
Array
(
[id] => 20283707
[patent_doc_number] => 20250308949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => DIE TO WAFER BONDING METHOD AND APPARATUS WITH THERMAL CONTACT DIE SHAPE CONTROL
[patent_app_type] => utility
[patent_app_number] => 18/622694
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1260
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622694
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622694 | DIE TO WAFER BONDING METHOD AND APPARATUS WITH THERMAL CONTACT DIE SHAPE CONTROL | Mar 28, 2024 | Pending |