Search

Shaka Shakar White

Examiner (ID: 4923)

Most Active Art Unit
2823
Art Unit(s)
2826, 2829, 2809, 2823
Total Applications
474
Issued Applications
353
Pending Applications
0
Abandoned Applications
121

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4492682 [patent_doc_number] => 07955909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Strained ultra-thin SOI transistor formed by replacement gate' [patent_app_type] => utility [patent_app_number] => 12/057443 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4050 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/955/07955909.pdf [firstpage_image] =>[orig_patent_app_number] => 12057443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/057443
Strained ultra-thin SOI transistor formed by replacement gate Mar 27, 2008 Issued
Array ( [id] => 5413462 [patent_doc_number] => 20090039349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Manufacturing method of semiconductor device, manufacturing method of display device, semiconductor device, display device, and electronic device' [patent_app_type] => utility [patent_app_number] => 12/078093 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16680 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039349.pdf [firstpage_image] =>[orig_patent_app_number] => 12078093 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/078093
Manufacturing method of semiconductor device, manufacturing method of display device, semiconductor device, display device, and electronic device Mar 26, 2008 Issued
Array ( [id] => 4925211 [patent_doc_number] => 20080164574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'INTEGRATED CIRCUITS WITH CONDUCTIVE FEATURES IN THROUGH HOLES PASSING THROUGH OTHER CONDUCTIVE FEATURES AND THROUGH A SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/051269 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3345 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164574.pdf [firstpage_image] =>[orig_patent_app_number] => 12051269 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051269
INTEGRATED CIRCUITS WITH CONDUCTIVE FEATURES IN THROUGH HOLES PASSING THROUGH OTHER CONDUCTIVE FEATURES AND THROUGH A SEMICONDUCTOR SUBSTRATE Mar 18, 2008 Abandoned
Array ( [id] => 4816983 [patent_doc_number] => 20080224242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'PROCESS FOR MANUFACTURING A MEMBRANE OF SEMICONDUCTOR MATERIAL INTEGRATED IN, AND ELECTRICALLY INSULATED FROM, A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/047830 [patent_app_country] => US [patent_app_date] => 2008-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4512 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224242.pdf [firstpage_image] =>[orig_patent_app_number] => 12047830 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/047830
Process for manufacturing a membrane of semiconductor material integrated in, and electrically insulated from, a substrate Mar 12, 2008 Issued
Array ( [id] => 8352001 [patent_doc_number] => 08247330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die' [patent_app_type] => utility [patent_app_number] => 12/530134 [patent_app_country] => US [patent_app_date] => 2008-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 20514 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12530134 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/530134
Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die Mar 5, 2008 Issued
Array ( [id] => 7965727 [patent_doc_number] => 07939379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Hybrid carrier and a method for making the same' [patent_app_type] => utility [patent_app_number] => 12/025824 [patent_app_country] => US [patent_app_date] => 2008-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2928 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/939/07939379.pdf [firstpage_image] =>[orig_patent_app_number] => 12025824 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/025824
Hybrid carrier and a method for making the same Feb 4, 2008 Issued
Array ( [id] => 5524778 [patent_doc_number] => 20090194854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/024634 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4637 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20090194854.pdf [firstpage_image] =>[orig_patent_app_number] => 12024634 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/024634
Semiconductor device package and method of making a semiconductor device package Jan 31, 2008 Issued
Array ( [id] => 4474425 [patent_doc_number] => 07867817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Method for manufacturing a wafer level package' [patent_app_type] => utility [patent_app_number] => 12/023853 [patent_app_country] => US [patent_app_date] => 2008-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 25 [patent_no_of_words] => 2752 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/867/07867817.pdf [firstpage_image] =>[orig_patent_app_number] => 12023853 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/023853
Method for manufacturing a wafer level package Jan 30, 2008 Issued
Array ( [id] => 4445923 [patent_doc_number] => 07863693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Forming conductive stud for semiconductive devices' [patent_app_type] => utility [patent_app_number] => 12/013622 [patent_app_country] => US [patent_app_date] => 2008-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 5663 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863693.pdf [firstpage_image] =>[orig_patent_app_number] => 12013622 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/013622
Forming conductive stud for semiconductive devices Jan 13, 2008 Issued
Array ( [id] => 4829416 [patent_doc_number] => 20080128876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'CHIP ON LEADS' [patent_app_type] => utility [patent_app_number] => 11/943793 [patent_app_country] => US [patent_app_date] => 2007-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4104 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128876.pdf [firstpage_image] =>[orig_patent_app_number] => 11943793 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/943793
Chip on leads Nov 20, 2007 Issued
Array ( [id] => 5275563 [patent_doc_number] => 20090127695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'SURFACE MOUNT PACKAGE WITH ENHANCED STRENGTH SOLDER JOINT' [patent_app_type] => utility [patent_app_number] => 11/942404 [patent_app_country] => US [patent_app_date] => 2007-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4673 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20090127695.pdf [firstpage_image] =>[orig_patent_app_number] => 11942404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/942404
SURFACE MOUNT PACKAGE WITH ENHANCED STRENGTH SOLDER JOINT Nov 18, 2007 Abandoned
Array ( [id] => 4958040 [patent_doc_number] => 20080272464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Semiconductor Wafer Having Through-Hole Vias on Saw Streets with Backside Redistribution Layer' [patent_app_type] => utility [patent_app_number] => 11/861244 [patent_app_country] => US [patent_app_date] => 2007-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4613 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20080272464.pdf [firstpage_image] =>[orig_patent_app_number] => 11861244 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861244
Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer Sep 24, 2007 Issued
Array ( [id] => 5296635 [patent_doc_number] => 20090011561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'Method of fabricating high-voltage mos having doubled-diffused drain' [patent_app_type] => utility [patent_app_number] => 11/902314 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1473 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20090011561.pdf [firstpage_image] =>[orig_patent_app_number] => 11902314 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902314
Method of fabricating high-voltage mos having doubled-diffused drain Sep 19, 2007 Abandoned
Array ( [id] => 112381 [patent_doc_number] => 07713845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Laser processing method for wafer' [patent_app_type] => utility [patent_app_number] => 11/901774 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6505 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/713/07713845.pdf [firstpage_image] =>[orig_patent_app_number] => 11901774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/901774
Laser processing method for wafer Sep 18, 2007 Issued
Array ( [id] => 5452733 [patent_doc_number] => 20090068770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'TACTILE SURFACE INSPECTION DURING DEVICE FABRICATION OR ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 11/852493 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2706 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20090068770.pdf [firstpage_image] =>[orig_patent_app_number] => 11852493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/852493
Tactile surface inspection during device fabrication or assembly Sep 9, 2007 Issued
Array ( [id] => 5323578 [patent_doc_number] => 20090061568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'Techniques for Fabricating Nanowire Field-Effect Transistors' [patent_app_type] => utility [patent_app_number] => 11/850644 [patent_app_country] => US [patent_app_date] => 2007-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17563 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20090061568.pdf [firstpage_image] =>[orig_patent_app_number] => 11850644 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/850644
Techniques for fabricating nanowire field-effect transistors Sep 4, 2007 Issued
Array ( [id] => 132657 [patent_doc_number] => 07696080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Method for manufacturing SIP semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/844423 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1315 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696080.pdf [firstpage_image] =>[orig_patent_app_number] => 11844423 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844423
Method for manufacturing SIP semiconductor device Aug 23, 2007 Issued
Array ( [id] => 7593304 [patent_doc_number] => 07651896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/844134 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 56 [patent_no_of_words] => 16164 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/651/07651896.pdf [firstpage_image] =>[orig_patent_app_number] => 11844134 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844134
Method for manufacturing semiconductor device Aug 22, 2007 Issued
Array ( [id] => 132589 [patent_doc_number] => 07696045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/840964 [patent_app_country] => US [patent_app_date] => 2007-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2031 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696045.pdf [firstpage_image] =>[orig_patent_app_number] => 11840964 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/840964
Method of manufacturing semiconductor device Aug 17, 2007 Issued
Array ( [id] => 8610711 [patent_doc_number] => 20130016023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'APPARATUS AND METHODS FOR PACKAGING ANTENNAS WITH INTEGRATED CIRCUIT CHIPS FOR MILLIMETER WAVE APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 11/830239 [patent_app_country] => US [patent_app_date] => 2007-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6637 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11830239 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/830239
Apparatus and methods for packaging antennas with integrated circuit chips for millimeter wave applications Jul 29, 2007 Issued
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