
Shaka Shakar White
Examiner (ID: 17904)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2809, 2823, 2829, 2826 |
| Total Applications | 474 |
| Issued Applications | 353 |
| Pending Applications | 0 |
| Abandoned Applications | 121 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9728540
[patent_doc_number] => 20140264247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'Resistive Memory Cell with Reduced Bottom Electrode'
[patent_app_type] => utility
[patent_app_number] => 14/183792
[patent_app_country] => US
[patent_app_date] => 2014-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2717
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14183792
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/183792 | Resistive Memory Cell with Reduced Bottom Electrode | Feb 18, 2014 | Abandoned |
Array
(
[id] => 9537801
[patent_doc_number] => 20140162448
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-12
[patent_title] => 'SEMICONDUCTOR DEVICE WITH METAL GATES AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/181360
[patent_app_country] => US
[patent_app_date] => 2014-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6154
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14181360
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/181360 | Semiconductor device with metal gates and method for fabricating the same | Feb 13, 2014 | Issued |
Array
(
[id] => 9642662
[patent_doc_number] => 20140220773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'FABRICATION OF GRAPHENE NANORIBBONS AND NANOWIRES'
[patent_app_type] => utility
[patent_app_number] => 14/171642
[patent_app_country] => US
[patent_app_date] => 2014-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 24389
[patent_no_of_claims] => 64
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171642
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/171642 | Fabrication of graphene nanoribbons and nanowires using a meniscus as an etch mask | Feb 2, 2014 | Issued |
Array
(
[id] => 11765090
[patent_doc_number] => 09373536
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-21
[patent_title] => 'Stress reduction apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/137765
[patent_app_country] => US
[patent_app_date] => 2013-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2906
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137765
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/137765 | Stress reduction apparatus | Dec 19, 2013 | Issued |
Array
(
[id] => 10073638
[patent_doc_number] => 09112004
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-18
[patent_title] => 'Barrier layer for copper interconnect'
[patent_app_type] => utility
[patent_app_number] => 14/132651
[patent_app_country] => US
[patent_app_date] => 2013-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2993
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132651
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/132651 | Barrier layer for copper interconnect | Dec 17, 2013 | Issued |
Array
(
[id] => 10195735
[patent_doc_number] => 09224650
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Wafer dicing from wafer backside and front side'
[patent_app_type] => utility
[patent_app_number] => 14/103534
[patent_app_country] => US
[patent_app_date] => 2013-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 5874
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103534
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/103534 | Wafer dicing from wafer backside and front side | Dec 10, 2013 | Issued |
Array
(
[id] => 9418850
[patent_doc_number] => 20140103500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'MICROELECTRONIC ASSEMBLY WITH IMPEDANCE CONTROLLED WIREBOND AND CONDUCTIVE REFERENCE ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 14/071055
[patent_app_country] => US
[patent_app_date] => 2013-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 9863
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071055
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/071055 | Microelectronic assembly with impedance controlled wirebond and conductive reference element | Nov 3, 2013 | Issued |
Array
(
[id] => 10099916
[patent_doc_number] => 09136235
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-15
[patent_title] => 'Methods and apparatus of packaging semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 14/065134
[patent_app_country] => US
[patent_app_date] => 2013-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 3296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14065134
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/065134 | Methods and apparatus of packaging semiconductor devices | Oct 27, 2013 | Issued |
Array
(
[id] => 10010638
[patent_doc_number] => 09054166
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-09
[patent_title] => 'Through silicon via keep out zone formation method and system'
[patent_app_type] => utility
[patent_app_number] => 14/057951
[patent_app_country] => US
[patent_app_date] => 2013-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 3274
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14057951
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/057951 | Through silicon via keep out zone formation method and system | Oct 17, 2013 | Issued |
Array
(
[id] => 9491171
[patent_doc_number] => 20140141577
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL'
[patent_app_type] => utility
[patent_app_number] => 14/056233
[patent_app_country] => US
[patent_app_date] => 2013-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5311
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14056233
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/056233 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL | Oct 16, 2013 | Abandoned |
Array
(
[id] => 9435532
[patent_doc_number] => 20140113439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'METHOD OF DEPOSITING AN AMORPHOUS SILICON FILM'
[patent_app_type] => utility
[patent_app_number] => 14/056529
[patent_app_country] => US
[patent_app_date] => 2013-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2292
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14056529
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/056529 | METHOD OF DEPOSITING AN AMORPHOUS SILICON FILM | Oct 16, 2013 | Abandoned |
Array
(
[id] => 9561313
[patent_doc_number] => 20140179026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-26
[patent_title] => 'METHOD FOR GENERATING QUANTIZED ANOMALOUS HALL EFFECT'
[patent_app_type] => utility
[patent_app_number] => 14/055846
[patent_app_country] => US
[patent_app_date] => 2013-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 8978
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14055846
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/055846 | Method for generating quantized anomalous hall effect | Oct 15, 2013 | Issued |
Array
(
[id] => 9435529
[patent_doc_number] => 20140113436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'METHOD OF DEPOSITING A FILM AND FILM DEPOSITION APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/054932
[patent_app_country] => US
[patent_app_date] => 2013-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10668
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14054932
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/054932 | Method of depositing a film and film deposition apparatus | Oct 15, 2013 | Issued |
Array
(
[id] => 10580789
[patent_doc_number] => 09302906
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-05
[patent_title] => 'Capacitive pressure sensor and method'
[patent_app_type] => utility
[patent_app_number] => 14/042861
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 24
[patent_no_of_words] => 3770
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042861
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/042861 | Capacitive pressure sensor and method | Sep 30, 2013 | Issued |
Array
(
[id] => 9393928
[patent_doc_number] => 20140091334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-03
[patent_title] => 'ENCAPSULATING SHEET-COVERED SEMICONDUCTOR ELEMENT, PRODUCING METHOD THEREOF, SEMICONDUCTOR DEVICE, AND PRODUCING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/042958
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 36648
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042958
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/042958 | ENCAPSULATING SHEET-COVERED SEMICONDUCTOR ELEMENT, PRODUCING METHOD THEREOF, SEMICONDUCTOR DEVICE, AND PRODUCING METHOD THEREOF | Sep 30, 2013 | Abandoned |
Array
(
[id] => 9914380
[patent_doc_number] => 20150069584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-12
[patent_title] => 'SEMICONDUCTOR STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 14/042976
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2038
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042976
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/042976 | Semiconductor structure | Sep 30, 2013 | Issued |
Array
(
[id] => 10563577
[patent_doc_number] => 09287258
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-15
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/031132
[patent_app_country] => US
[patent_app_date] => 2013-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 53
[patent_no_of_words] => 16457
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031132
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/031132 | Semiconductor device | Sep 18, 2013 | Issued |
Array
(
[id] => 10016252
[patent_doc_number] => 09059274
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Replacement gate self-aligned carbon nanostructure transistor'
[patent_app_type] => utility
[patent_app_number] => 14/020320
[patent_app_country] => US
[patent_app_date] => 2013-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 16
[patent_no_of_words] => 6544
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14020320
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/020320 | Replacement gate self-aligned carbon nanostructure transistor | Sep 5, 2013 | Issued |
Array
(
[id] => 10845032
[patent_doc_number] => 08872212
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Light emitting device, light emitting device package comprising the same and lighting system'
[patent_app_type] => utility
[patent_app_number] => 13/929459
[patent_app_country] => US
[patent_app_date] => 2013-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 5323
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929459
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/929459 | Light emitting device, light emitting device package comprising the same and lighting system | Jun 26, 2013 | Issued |
Array
(
[id] => 9223133
[patent_doc_number] => 20140017908
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-16
[patent_title] => 'Method for Forming Conformal, Homogeneous Dielectric Film by Cyclic Deposition and Heat Treatment'
[patent_app_type] => utility
[patent_app_number] => 13/923197
[patent_app_country] => US
[patent_app_date] => 2013-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6985
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13923197
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/923197 | Method for forming conformal, homogeneous dielectric film by cyclic deposition and heat treatment | Jun 19, 2013 | Issued |