
Shaka Shakar White
Examiner (ID: 4923)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2826, 2829, 2809, 2823 |
| Total Applications | 474 |
| Issued Applications | 353 |
| Pending Applications | 0 |
| Abandoned Applications | 121 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 274173
[patent_doc_number] => 07560337
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-14
[patent_title] => 'Programmable resistive RAM and manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 11/426213
[patent_app_country] => US
[patent_app_date] => 2006-06-23
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4948
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[pdf_file] => patents/07/560/07560337.pdf
[firstpage_image] =>[orig_patent_app_number] => 11426213
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/426213 | Programmable resistive RAM and manufacturing method | Jun 22, 2006 | Issued |
Array
(
[id] => 5154527
[patent_doc_number] => 20070037410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'METHOD FOR FORMING A LITHOGRAPHY PATTERN'
[patent_app_type] => utility
[patent_app_number] => 11/426233
[patent_app_country] => US
[patent_app_date] => 2006-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0037/20070037410.pdf
[firstpage_image] =>[orig_patent_app_number] => 11426233
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/426233 | Method for forming a lithography pattern | Jun 22, 2006 | Issued |
Array
(
[id] => 5199206
[patent_doc_number] => 20070298524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'METHODS OF QUANTIFYING VARIATIONS RESULTING FROM MANUFACTURING-INDUCED CORNER ROUNDING OF VARIOUS FEATURES, AND STRUCTURES FOR TESTING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/425913
[patent_app_country] => US
[patent_app_date] => 2006-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0298/20070298524.pdf
[firstpage_image] =>[orig_patent_app_number] => 11425913
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/425913 | Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same | Jun 21, 2006 | Issued |
Array
(
[id] => 5477681
[patent_doc_number] => 20090200638
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-13
[patent_title] => 'MIM CAPACITOR INTEGRATION'
[patent_app_type] => utility
[patent_app_number] => 12/304194
[patent_app_country] => US
[patent_app_date] => 2006-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[firstpage_image] =>[orig_patent_app_number] => 12304194
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/304194 | MIM capacitor integration | Jun 14, 2006 | Issued |
Array
(
[id] => 102483
[patent_doc_number] => 07723224
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Microelectronic assembly with back side metallization and method for forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/453763
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[pdf_file] => patents/07/723/07723224.pdf
[firstpage_image] =>[orig_patent_app_number] => 11453763
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/453763 | Microelectronic assembly with back side metallization and method for forming the same | Jun 13, 2006 | Issued |
Array
(
[id] => 5602450
[patent_doc_number] => 20060292795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'Method of manufacturing a flash memory device'
[patent_app_type] => utility
[patent_app_number] => 11/449848
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[patent_app_date] => 2006-06-09
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[firstpage_image] =>[orig_patent_app_number] => 11449848
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/449848 | Method of manufacturing a flash memory device | Jun 8, 2006 | Issued |
Array
(
[id] => 5107135
[patent_doc_number] => 20070066013
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[patent_kind] => A1
[patent_issue_date] => 2007-03-22
[patent_title] => 'Method for fabricating semiconductor device'
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[patent_app_number] => 11/448678
[patent_app_country] => US
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[pdf_file] => publications/A1/0066/20070066013.pdf
[firstpage_image] =>[orig_patent_app_number] => 11448678
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/448678 | Method for fabricating semiconductor device | Jun 7, 2006 | Issued |
Array
(
[id] => 274163
[patent_doc_number] => 07560327
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-14
[patent_title] => 'Method of fabricating semiconductor device with dual gate structure'
[patent_app_type] => utility
[patent_app_number] => 11/450658
[patent_app_country] => US
[patent_app_date] => 2006-06-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/560/07560327.pdf
[firstpage_image] =>[orig_patent_app_number] => 11450658
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/450658 | Method of fabricating semiconductor device with dual gate structure | Jun 7, 2006 | Issued |
Array
(
[id] => 62734
[patent_doc_number] => 07763487
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-27
[patent_title] => 'Integrated differential pressure sensor and manufacturing process thereof'
[patent_app_type] => utility
[patent_app_number] => 11/417683
[patent_app_country] => US
[patent_app_date] => 2006-05-04
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[pdf_file] => patents/07/763/07763487.pdf
[firstpage_image] =>[orig_patent_app_number] => 11417683
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/417683 | Integrated differential pressure sensor and manufacturing process thereof | May 3, 2006 | Issued |
Array
(
[id] => 5123547
[patent_doc_number] => 20070235817
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[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'Write margin improvement for SRAM cells with SiGe stressors'
[patent_app_type] => utility
[patent_app_number] => 11/401204
[patent_app_country] => US
[patent_app_date] => 2006-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[pdf_file] => publications/A1/0235/20070235817.pdf
[firstpage_image] =>[orig_patent_app_number] => 11401204
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/401204 | Write margin improvement for SRAM cells with SiGe stressors | Apr 9, 2006 | Issued |
Array
(
[id] => 4068
[patent_doc_number] => 07816203
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-10-19
[patent_title] => 'Method for fabricating a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/378464
[patent_app_country] => US
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[pdf_file] => patents/07/816/07816203.pdf
[firstpage_image] =>[orig_patent_app_number] => 11378464
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/378464 | Method for fabricating a semiconductor device | Mar 15, 2006 | Issued |
Array
(
[id] => 5619551
[patent_doc_number] => 20060189085
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[patent_title] => 'Method of forming dual polysilicon gate of semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/356998 | Method of forming dual polysilicon gate of semiconductor device | Feb 16, 2006 | Abandoned |
Array
(
[id] => 5785552
[patent_doc_number] => 20060205122
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'Method for fabricating a field stop zone'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/357904 | Method for fabricating a field stop zone | Feb 16, 2006 | Abandoned |
Array
(
[id] => 5625471
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[patent_title] => 'Semiconductor device with capacitor structure for improving area utilization'
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Array
(
[id] => 5205096
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Array
(
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[patent_title] => 'Stressed-channel CMOS transistors'
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[firstpage_image] =>[orig_patent_app_number] => 11348034
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/348034 | Stressed-channel CMOS transistors | Feb 5, 2006 | Abandoned |
Array
(
[id] => 5672652
[patent_doc_number] => 20060178007
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[patent_title] => 'Method of forming copper wiring layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/344014 | Method of forming copper wiring layer | Jan 31, 2006 | Abandoned |
Array
(
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Array
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Array
(
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[patent_title] => 'Spacer T-gate structure for CoSi2 extendibility'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339953 | Spacer T-gate structure for CoSi2 extendibility | Jan 25, 2006 | Issued |