
Shaka Shakar White
Examiner (ID: 4923)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2826, 2829, 2809, 2823 |
| Total Applications | 474 |
| Issued Applications | 353 |
| Pending Applications | 0 |
| Abandoned Applications | 121 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 256277
[patent_doc_number] => 07575950
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/339674
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 34
[patent_no_of_words] => 15283
[patent_no_of_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/575/07575950.pdf
[firstpage_image] =>[orig_patent_app_number] => 11339674
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339674 | Semiconductor device and a method of manufacturing the same | Jan 25, 2006 | Issued |
Array
(
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[patent_doc_number] => 07622339
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-24
[patent_title] => 'EPI T-gate structure for CoSi2 extendibility'
[patent_app_type] => utility
[patent_app_number] => 11/340049
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/622/07622339.pdf
[firstpage_image] =>[orig_patent_app_number] => 11340049
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340049 | EPI T-gate structure for CoSi2 extendibility | Jan 25, 2006 | Issued |
Array
(
[id] => 579083
[patent_doc_number] => 07452777
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'Self-aligned trench MOSFET structure and method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/339998
[patent_app_country] => US
[patent_app_date] => 2006-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3464
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/452/07452777.pdf
[firstpage_image] =>[orig_patent_app_number] => 11339998
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339998 | Self-aligned trench MOSFET structure and method of manufacture | Jan 24, 2006 | Issued |
Array
(
[id] => 5874536
[patent_doc_number] => 20060166440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Semiconductor nonvolatile memory device, and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/335504
[patent_app_country] => US
[patent_app_date] => 2006-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4114
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[pdf_file] => publications/A1/0166/20060166440.pdf
[firstpage_image] =>[orig_patent_app_number] => 11335504
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/335504 | Semiconductor nonvolatile memory device, and manufacturing method thereof | Jan 19, 2006 | Abandoned |
Array
(
[id] => 5188582
[patent_doc_number] => 20070166890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'PFETS and methods of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/335763
[patent_app_country] => US
[patent_app_date] => 2006-01-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0166/20070166890.pdf
[firstpage_image] =>[orig_patent_app_number] => 11335763
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/335763 | PFETs and methods of manufacturing the same | Jan 18, 2006 | Issued |
Array
(
[id] => 4417
[patent_doc_number] => 07811891
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Method to control the gate sidewall profile by graded material composition'
[patent_app_type] => utility
[patent_app_number] => 11/331958
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/811/07811891.pdf
[firstpage_image] =>[orig_patent_app_number] => 11331958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/331958 | Method to control the gate sidewall profile by graded material composition | Jan 12, 2006 | Issued |
Array
(
[id] => 5642852
[patent_doc_number] => 20060281307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-14
[patent_title] => 'Post-attachment chip-to-chip connection'
[patent_app_type] => utility
[patent_app_number] => 11/329873
[patent_app_country] => US
[patent_app_date] => 2006-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 123
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[patent_no_of_words] => 47710
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0281/20060281307.pdf
[firstpage_image] =>[orig_patent_app_number] => 11329873
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/329873 | Post-attachment chip-to-chip connection | Jan 9, 2006 | Issued |
Array
(
[id] => 314794
[patent_doc_number] => 07524764
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Method of forming film pattern, device, method of manufacturing the same, electro-optical apparatus, and electronic apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/326914
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/524/07524764.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326914
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326914 | Method of forming film pattern, device, method of manufacturing the same, electro-optical apparatus, and electronic apparatus | Jan 5, 2006 | Issued |
Array
(
[id] => 4715071
[patent_doc_number] => 20080237593
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'Semiconductor Device, Method of Fabricating the Same, and Apparatus for Fabricating the Same'
[patent_app_type] => utility
[patent_app_number] => 11/794874
[patent_app_country] => US
[patent_app_date] => 2006-01-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/794874 | Semiconductor Device, Method of Fabricating the Same, and Apparatus for Fabricating the Same | Jan 5, 2006 | Abandoned |
Array
(
[id] => 4988774
[patent_doc_number] => 20070155113
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Thin-film capacitor with a field modification layer and methods for forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/326524
[patent_app_country] => US
[patent_app_date] => 2006-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 1663
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[pdf_file] => publications/A1/0155/20070155113.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326524
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326524 | Thin-film capacitor with a field modification layer and methods for forming the same | Jan 3, 2006 | Issued |
Array
(
[id] => 5631653
[patent_doc_number] => 20060148123
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Method for fabricating CMOS image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/320904
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11320904
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320904 | Method for fabricating CMOS image sensor | Dec 29, 2005 | Abandoned |
Array
(
[id] => 5076976
[patent_doc_number] => 20070120200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-31
[patent_title] => 'MOS transistor having double gate and manufacturing method thereof'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11320824
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320824 | MOS transistor having double gate and manufacturing method thereof | Dec 29, 2005 | Abandoned |
Array
(
[id] => 318593
[patent_doc_number] => 07521302
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-21
[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320863 | Semiconductor device and method of manufacturing the same | Dec 29, 2005 | Issued |
Array
(
[id] => 185018
[patent_doc_number] => 07648909
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[patent_kind] => B2
[patent_issue_date] => 2010-01-19
[patent_title] => 'Method for fabricating semiconductor device with metal line'
[patent_app_type] => utility
[patent_app_number] => 11/321533
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321533 | Method for fabricating semiconductor device with metal line | Dec 29, 2005 | Issued |
Array
(
[id] => 5631714
[patent_doc_number] => 20060148184
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[patent_kind] => A1
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[patent_title] => 'Method for forming LDMOS channel'
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Array
(
[id] => 277933
[patent_doc_number] => 07557007
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Array
(
[id] => 5141978
[patent_doc_number] => 20070004194
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[patent_title] => 'Method for fabricating semiconductor device with deep opening'
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Array
(
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Array
(
[id] => 5631675
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Array
(
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[patent_kind] => A1
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[patent_title] => 'System and method for solder bumping using a disposable mask and a barrier layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321104 | System and method for solder bumping using a disposable mask and a barrier layer | Dec 28, 2005 | Abandoned |