Search

Shaka Shakar White

Examiner (ID: 4923)

Most Active Art Unit
2823
Art Unit(s)
2826, 2829, 2809, 2823
Total Applications
474
Issued Applications
353
Pending Applications
0
Abandoned Applications
121

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 847113 [patent_doc_number] => 07384813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Method for fabricating CMOS image sensor' [patent_app_type] => utility [patent_app_number] => 11/316874 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1530 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/384/07384813.pdf [firstpage_image] =>[orig_patent_app_number] => 11316874 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316874
Method for fabricating CMOS image sensor Dec 26, 2005 Issued
Array ( [id] => 830134 [patent_doc_number] => 07399688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-15 [patent_title] => 'Identification code drawing method, substrate, display module, and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 11/319083 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7473 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/399/07399688.pdf [firstpage_image] =>[orig_patent_app_number] => 11319083 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319083
Identification code drawing method, substrate, display module, and electronic apparatus Dec 26, 2005 Issued
Array ( [id] => 5023004 [patent_doc_number] => 20070148970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Method of fabricating circuitry without conductive circle' [patent_app_type] => utility [patent_app_number] => 11/319874 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1147 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20070148970.pdf [firstpage_image] =>[orig_patent_app_number] => 11319874 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319874
Method of fabricating circuitry without conductive circle Dec 26, 2005 Abandoned
Array ( [id] => 5656028 [patent_doc_number] => 20060141764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Method of manufacturing wiring board' [patent_app_type] => utility [patent_app_number] => 11/317403 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6385 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20060141764.pdf [firstpage_image] =>[orig_patent_app_number] => 11317403 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317403
Method of manufacturing wiring board Dec 22, 2005 Issued
Array ( [id] => 864602 [patent_doc_number] => 07368346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Method for forming gate structure in flash memory device' [patent_app_type] => utility [patent_app_number] => 11/317684 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 1613 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368346.pdf [firstpage_image] =>[orig_patent_app_number] => 11317684 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317684
Method for forming gate structure in flash memory device Dec 22, 2005 Issued
Array ( [id] => 4988792 [patent_doc_number] => 20070155131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Method of singulating a microelectronic wafer' [patent_app_type] => utility [patent_app_number] => 11/315834 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155131.pdf [firstpage_image] =>[orig_patent_app_number] => 11315834 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/315834
Method of singulating a microelectronic wafer Dec 20, 2005 Abandoned
Array ( [id] => 5649141 [patent_doc_number] => 20060134876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'SRAM cell' [patent_app_type] => utility [patent_app_number] => 11/305553 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2870 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20060134876.pdf [firstpage_image] =>[orig_patent_app_number] => 11305553 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/305553
SRAM cell Dec 15, 2005 Issued
Array ( [id] => 5683052 [patent_doc_number] => 20060199322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Method of manufacturing semiconductor device including air space formed around gate electrode' [patent_app_type] => utility [patent_app_number] => 11/295663 [patent_app_country] => US [patent_app_date] => 2005-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6079 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199322.pdf [firstpage_image] =>[orig_patent_app_number] => 11295663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295663
Method of manufacturing semiconductor device including air space formed around gate electrode Dec 6, 2005 Issued
Array ( [id] => 5754150 [patent_doc_number] => 20060223299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Fabricating process of an electrically conductive structure on a circuit board' [patent_app_type] => utility [patent_app_number] => 11/295003 [patent_app_country] => US [patent_app_date] => 2005-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2341 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20060223299.pdf [firstpage_image] =>[orig_patent_app_number] => 11295003 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295003
Fabricating process of an electrically conductive structure on a circuit board Dec 4, 2005 Abandoned
Array ( [id] => 326586 [patent_doc_number] => 07514357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/293693 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3265 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/514/07514357.pdf [firstpage_image] =>[orig_patent_app_number] => 11293693 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/293693
Method of manufacturing a semiconductor device Dec 1, 2005 Issued
Array ( [id] => 5095725 [patent_doc_number] => 20070117334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'STRUCTURE AND METHOD FOR REDUCING MILLER CAPACITANCE IN FIELD EFFECT TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 11/164343 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3817 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20070117334.pdf [firstpage_image] =>[orig_patent_app_number] => 11164343 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164343
Structure and method for reducing miller capacitance in field effect transistors Nov 17, 2005 Issued
Array ( [id] => 5667099 [patent_doc_number] => 20060172449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Method for manufacturing semiconductor laser diode' [patent_app_type] => utility [patent_app_number] => 11/220117 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20060172449.pdf [firstpage_image] =>[orig_patent_app_number] => 11220117 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/220117
Method for manufacturing semiconductor laser diode Sep 5, 2005 Abandoned
Array ( [id] => 4612937 [patent_doc_number] => 07989320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Die bonding' [patent_app_type] => utility [patent_app_number] => 10/561883 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2413 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989320.pdf [firstpage_image] =>[orig_patent_app_number] => 10561883 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/561883
Die bonding Jun 30, 2004 Issued
Array ( [id] => 220931 [patent_doc_number] => 07608477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Process for substrate incorporating component' [patent_app_type] => utility [patent_app_number] => 10/560223 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7365 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608477.pdf [firstpage_image] =>[orig_patent_app_number] => 10560223 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/560223
Process for substrate incorporating component Mar 25, 2004 Issued
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