Search

Shaka Shakar White

Examiner (ID: 4923)

Most Active Art Unit
2823
Art Unit(s)
2826, 2829, 2809, 2823
Total Applications
474
Issued Applications
353
Pending Applications
0
Abandoned Applications
121

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8777399 [patent_doc_number] => 20130099375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'SEMICONDUCTOR PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/656339 [patent_app_country] => US [patent_app_date] => 2012-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3695 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13656339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/656339
Semiconductor package substrate and semiconductor package including the same Oct 18, 2012 Issued
Array ( [id] => 8818328 [patent_doc_number] => 20130119373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/654889 [patent_app_country] => US [patent_app_date] => 2012-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 27930 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654889 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/654889
Transistor with oxide semiconductor channel having protective layer Oct 17, 2012 Issued
Array ( [id] => 9195369 [patent_doc_number] => 20130334684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/654780 [patent_app_country] => US [patent_app_date] => 2012-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1670 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654780 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/654780
SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE Oct 17, 2012 Abandoned
Array ( [id] => 10857427 [patent_doc_number] => 08883623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Facilitating gate height uniformity and inter-layer dielectric protection' [patent_app_type] => utility [patent_app_number] => 13/654717 [patent_app_country] => US [patent_app_date] => 2012-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3499 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/654717
Facilitating gate height uniformity and inter-layer dielectric protection Oct 17, 2012 Issued
Array ( [id] => 9958693 [patent_doc_number] => 09006904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Dual side package on package' [patent_app_type] => utility [patent_app_number] => 13/654850 [patent_app_country] => US [patent_app_date] => 2012-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1873 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/654850
Dual side package on package Oct 17, 2012 Issued
Array ( [id] => 8610140 [patent_doc_number] => 20130015452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/616150 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10951 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13616150 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/616150
ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE Sep 13, 2012 Abandoned
Array ( [id] => 10004214 [patent_doc_number] => 09048313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Semiconductor device that can maintain high voltage while lowering on-state resistance' [patent_app_type] => utility [patent_app_number] => 13/607697 [patent_app_country] => US [patent_app_date] => 2012-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607697
Semiconductor device that can maintain high voltage while lowering on-state resistance Sep 7, 2012 Issued
Array ( [id] => 8694836 [patent_doc_number] => 20130056845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'METHOD FOR FORMING AN ISOLATION TRENCH' [patent_app_type] => utility [patent_app_number] => 13/607165 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3032 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607165 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607165
METHOD FOR FORMING AN ISOLATION TRENCH Sep 6, 2012 Abandoned
Array ( [id] => 10845081 [patent_doc_number] => 08872261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 13/607255 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7012 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607255 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607255
Semiconductor device and manufacturing method of the same Sep 6, 2012 Issued
Array ( [id] => 9051254 [patent_doc_number] => 20130248968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 13/606757 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 4794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606757 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/606757
Nonvolatile semiconductor device and its manufacturing method having memory cells with multiple layers Sep 6, 2012 Issued
Array ( [id] => 9360439 [patent_doc_number] => 20140070311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND RELATED FABRICATION METHODS' [patent_app_type] => utility [patent_app_number] => 13/606797 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606797 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/606797
Semiconductor device and related fabrication methods Sep 6, 2012 Issued
Array ( [id] => 9334950 [patent_doc_number] => 20140061732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'METHOD AND DEVICE TO ACHIEVE SELF-STOP AND PRECISE GATE HEIGHT' [patent_app_type] => utility [patent_app_number] => 13/596808 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13596808 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/596808
Method and device to achieve self-stop and precise gate height Aug 27, 2012 Issued
Array ( [id] => 8509768 [patent_doc_number] => 20120309176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/586091 [patent_app_country] => US [patent_app_date] => 2012-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11134 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586091 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/586091
Method of manufacturing a semiconductor device Aug 14, 2012 Issued
Array ( [id] => 8486520 [patent_doc_number] => 20120285927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'METHOD OF FORMING MICROPATTERN, DIE FORMED BY THIS METHOD OF FORMING MICROPATTERN, TRANSFER METHOD AND MICROPATTERN FORMING METHOD USING THIS DIE' [patent_app_type] => utility [patent_app_number] => 13/555768 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 20572 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555768 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555768
Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die Jul 22, 2012 Issued
Array ( [id] => 10851506 [patent_doc_number] => 08878190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/555430 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2514 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555430 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555430
Semiconductor device and method for manufacturing the same Jul 22, 2012 Issued
Array ( [id] => 9427544 [patent_doc_number] => 08703618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die' [patent_app_type] => utility [patent_app_number] => 13/555728 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 20576 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555728 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555728
Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die Jul 22, 2012 Issued
Array ( [id] => 8486521 [patent_doc_number] => 20120285928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'METHOD OF FORMING MICROPATTERN, DIE FORMED BY THIS METHOD OF FORMING MICROPATTERN, TRANSFER METHOD AND MICROPATTERN FORMING METHOD USING THIS DIE' [patent_app_type] => utility [patent_app_number] => 13/555781 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 20573 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555781 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555781
Method of forming micropattern, die formed by this method of forming micropattern, transfer method and micropattern forming method using this die Jul 22, 2012 Issued
Array ( [id] => 10858067 [patent_doc_number] => 08884269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Nitride-based semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 13/555370 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555370
Nitride-based semiconductor light emitting device Jul 22, 2012 Issued
Array ( [id] => 9677449 [patent_doc_number] => 08816360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Multi-chip package cross-reference to related applications' [patent_app_type] => utility [patent_app_number] => 13/555539 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3435 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555539 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555539
Multi-chip package cross-reference to related applications Jul 22, 2012 Issued
Array ( [id] => 10837872 [patent_doc_number] => 08865544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Methods of forming capacitors' [patent_app_type] => utility [patent_app_number] => 13/546927 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5386 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546927
Methods of forming capacitors Jul 10, 2012 Issued
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