Search

Shaka Shakar White

Examiner (ID: 4923)

Most Active Art Unit
2823
Art Unit(s)
2826, 2829, 2809, 2823
Total Applications
474
Issued Applications
353
Pending Applications
0
Abandoned Applications
121

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7669648 [patent_doc_number] => 20110318917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'METHODS OF FORMING THROUGH-SILICON VIA STRUCTURES INCLUDING CONDUCTIVE PROTECTIVE LAYERS' [patent_app_type] => utility [patent_app_number] => 13/163284 [patent_app_country] => US [patent_app_date] => 2011-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6605 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13163284 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/163284
METHODS OF FORMING THROUGH-SILICON VIA STRUCTURES INCLUDING CONDUCTIVE PROTECTIVE LAYERS Jun 16, 2011 Abandoned
Array ( [id] => 7480752 [patent_doc_number] => 20110233652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/156727 [patent_app_country] => US [patent_app_date] => 2011-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7857 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233652.pdf [firstpage_image] =>[orig_patent_app_number] => 13156727 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/156727
Non-volatile semiconductor storage device Jun 8, 2011 Issued
Array ( [id] => 6083668 [patent_doc_number] => 20110215398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/107542 [patent_app_country] => US [patent_app_date] => 2011-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9505 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20110215398.pdf [firstpage_image] =>[orig_patent_app_number] => 13107542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/107542
Method of fabricating semiconductor device May 12, 2011 Issued
13/064992 Organic thin film transistor, method of manufacturing the same, and biosensor using the transistor Apr 28, 2011 Abandoned
Array ( [id] => 6111746 [patent_doc_number] => 20110189841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'FABRICATION OF LARGE GRAIN POLYCRYSTALLINE SILICON FILM BY NANO ALUMINUM-INDUCED CRYSTALLIZATION OF AMORPHOUS SILICON' [patent_app_type] => utility [patent_app_number] => 13/084337 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7972 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20110189841.pdf [firstpage_image] =>[orig_patent_app_number] => 13084337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/084337
FABRICATION OF LARGE GRAIN POLYCRYSTALLINE SILICON FILM BY NANO ALUMINUM-INDUCED CRYSTALLIZATION OF AMORPHOUS SILICON Apr 10, 2011 Abandoned
Array ( [id] => 6098932 [patent_doc_number] => 20110163411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'MULTI-LAYER MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/049495 [patent_app_country] => US [patent_app_date] => 2011-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5919 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20110163411.pdf [firstpage_image] =>[orig_patent_app_number] => 13049495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/049495
Multi-layer memory devices Mar 15, 2011 Issued
Array ( [id] => 9027067 [patent_doc_number] => 08536650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Strained ultra-thin SOI transistor formed by replacement gate' [patent_app_type] => utility [patent_app_number] => 13/020223 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4129 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13020223 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020223
Strained ultra-thin SOI transistor formed by replacement gate Feb 2, 2011 Issued
Array ( [id] => 9027012 [patent_doc_number] => 08536594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Solid state lighting devices with reduced dimensions and methods of manufacturing' [patent_app_type] => utility [patent_app_number] => 13/016183 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4779 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13016183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/016183
Solid state lighting devices with reduced dimensions and methods of manufacturing Jan 27, 2011 Issued
Array ( [id] => 9844751 [patent_doc_number] => 08946668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/574405 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4733 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13574405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/574405
Semiconductor device and method of manufacturing the same Jan 20, 2011 Issued
Array ( [id] => 9127815 [patent_doc_number] => 08575766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Microelectronic assembly with impedance controlled wirebond and conductive reference element' [patent_app_type] => utility [patent_app_number] => 12/986556 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 9852 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986556 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986556
Microelectronic assembly with impedance controlled wirebond and conductive reference element Jan 6, 2011 Issued
Array ( [id] => 5971076 [patent_doc_number] => 20110151606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/974237 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7289 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151606.pdf [firstpage_image] =>[orig_patent_app_number] => 12974237 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974237
Light emitting device and method of manufacture Dec 20, 2010 Issued
Array ( [id] => 6161937 [patent_doc_number] => 20110159680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'METHOD OF FORMING A DIELECTRIC LAYER AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/975071 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20110159680.pdf [firstpage_image] =>[orig_patent_app_number] => 12975071 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/975071
METHOD OF FORMING A DIELECTRIC LAYER AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME Dec 20, 2010 Abandoned
Array ( [id] => 5971210 [patent_doc_number] => 20110151660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/974884 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17135 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151660.pdf [firstpage_image] =>[orig_patent_app_number] => 12974884 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974884
Method of manufacturing semiconductor device, method of processing substrate and substrate processing apparatus Dec 20, 2010 Issued
Array ( [id] => 6161816 [patent_doc_number] => 20110159632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'METHOD FOR MANUFACTURING A SOLID-STATE IMAGE CAPTURING ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/966445 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12841 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20110159632.pdf [firstpage_image] =>[orig_patent_app_number] => 12966445 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/966445
METHOD FOR MANUFACTURING A SOLID-STATE IMAGE CAPTURING ELEMENT Dec 12, 2010 Abandoned
Array ( [id] => 9483007 [patent_doc_number] => 08728958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Gap fill integration' [patent_app_type] => utility [patent_app_number] => 12/964110 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 15360 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964110 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964110
Gap fill integration Dec 8, 2010 Issued
Array ( [id] => 8969114 [patent_doc_number] => 08507928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Organic EL device, method for manufacturing organic EL device, and electronic device' [patent_app_type] => utility [patent_app_number] => 12/912143 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 14974 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12912143 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/912143
Organic EL device, method for manufacturing organic EL device, and electronic device Oct 25, 2010 Issued
Array ( [id] => 5985782 [patent_doc_number] => 20110097881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Method of Forming Mono-Crystalline Germanium or Silicon Germanium' [patent_app_type] => utility [patent_app_number] => 12/910348 [patent_app_country] => US [patent_app_date] => 2010-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6131 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20110097881.pdf [firstpage_image] =>[orig_patent_app_number] => 12910348 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/910348
Method of Forming Mono-Crystalline Germanium or Silicon Germanium Oct 21, 2010 Abandoned
Array ( [id] => 8159369 [patent_doc_number] => 20120100674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/909325 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4505 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100674.pdf [firstpage_image] =>[orig_patent_app_number] => 12909325 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909325
Semiconductor structure and methods of manufacture Oct 20, 2010 Issued
Array ( [id] => 7795799 [patent_doc_number] => 08124505 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-28 [patent_title] => 'Two stage plasma etching method for enhancement mode GaN HFET' [patent_app_type] => utility [patent_app_number] => 12/909497 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 5264 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/124/08124505.pdf [firstpage_image] =>[orig_patent_app_number] => 12909497 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909497
Two stage plasma etching method for enhancement mode GaN HFET Oct 20, 2010 Issued
Array ( [id] => 8159398 [patent_doc_number] => 20120100686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'METHOD OF FORMING ULTRA-SHALLOW JUNCTIONS IN SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 12/908640 [patent_app_country] => US [patent_app_date] => 2010-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4780 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100686.pdf [firstpage_image] =>[orig_patent_app_number] => 12908640 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908640
METHOD OF FORMING ULTRA-SHALLOW JUNCTIONS IN SEMICONDUCTOR DEVICES Oct 19, 2010 Abandoned
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